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![Gustavo A. R. Silva](/assets/img/avatar_default.png)
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
1100 lines
24 KiB
C
1100 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* xhci-dbgcap.c - xHCI debug capability support
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*
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* Copyright (C) 2017 Intel Corporation
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*
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* Author: Lu Baolu <baolu.lu@linux.intel.com>
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*/
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/nls.h>
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#include "xhci.h"
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#include "xhci-trace.h"
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#include "xhci-dbgcap.h"
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static void dbc_free_ctx(struct device *dev, struct xhci_container_ctx *ctx)
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{
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if (!ctx)
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return;
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dma_free_coherent(dev, ctx->size, ctx->bytes, ctx->dma);
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kfree(ctx);
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}
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/* we use only one segment for DbC rings */
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static void dbc_ring_free(struct device *dev, struct xhci_ring *ring)
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{
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if (!ring)
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return;
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if (ring->first_seg && ring->first_seg->trbs) {
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dma_free_coherent(dev, TRB_SEGMENT_SIZE,
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ring->first_seg->trbs,
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ring->first_seg->dma);
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kfree(ring->first_seg);
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}
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kfree(ring);
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}
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static u32 xhci_dbc_populate_strings(struct dbc_str_descs *strings)
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{
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struct usb_string_descriptor *s_desc;
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u32 string_length;
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/* Serial string: */
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s_desc = (struct usb_string_descriptor *)strings->serial;
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utf8s_to_utf16s(DBC_STRING_SERIAL, strlen(DBC_STRING_SERIAL),
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UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
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DBC_MAX_STRING_LENGTH);
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s_desc->bLength = (strlen(DBC_STRING_SERIAL) + 1) * 2;
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s_desc->bDescriptorType = USB_DT_STRING;
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string_length = s_desc->bLength;
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string_length <<= 8;
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/* Product string: */
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s_desc = (struct usb_string_descriptor *)strings->product;
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utf8s_to_utf16s(DBC_STRING_PRODUCT, strlen(DBC_STRING_PRODUCT),
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UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
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DBC_MAX_STRING_LENGTH);
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s_desc->bLength = (strlen(DBC_STRING_PRODUCT) + 1) * 2;
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s_desc->bDescriptorType = USB_DT_STRING;
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string_length += s_desc->bLength;
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string_length <<= 8;
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/* Manufacture string: */
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s_desc = (struct usb_string_descriptor *)strings->manufacturer;
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utf8s_to_utf16s(DBC_STRING_MANUFACTURER,
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strlen(DBC_STRING_MANUFACTURER),
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UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
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DBC_MAX_STRING_LENGTH);
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s_desc->bLength = (strlen(DBC_STRING_MANUFACTURER) + 1) * 2;
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s_desc->bDescriptorType = USB_DT_STRING;
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string_length += s_desc->bLength;
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string_length <<= 8;
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/* String0: */
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strings->string0[0] = 4;
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strings->string0[1] = USB_DT_STRING;
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strings->string0[2] = 0x09;
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strings->string0[3] = 0x04;
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string_length += 4;
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return string_length;
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}
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static void xhci_dbc_init_contexts(struct xhci_dbc *dbc, u32 string_length)
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{
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struct dbc_info_context *info;
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struct xhci_ep_ctx *ep_ctx;
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u32 dev_info;
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dma_addr_t deq, dma;
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unsigned int max_burst;
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if (!dbc)
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return;
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/* Populate info Context: */
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info = (struct dbc_info_context *)dbc->ctx->bytes;
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dma = dbc->string_dma;
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info->string0 = cpu_to_le64(dma);
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info->manufacturer = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH);
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info->product = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 2);
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info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
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info->length = cpu_to_le32(string_length);
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/* Populate bulk out endpoint context: */
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ep_ctx = dbc_bulkout_ctx(dbc);
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max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
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deq = dbc_bulkout_enq(dbc);
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ep_ctx->ep_info = 0;
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ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
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ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
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/* Populate bulk in endpoint context: */
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ep_ctx = dbc_bulkin_ctx(dbc);
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deq = dbc_bulkin_enq(dbc);
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ep_ctx->ep_info = 0;
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ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
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ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
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/* Set DbC context and info registers: */
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lo_hi_writeq(dbc->ctx->dma, &dbc->regs->dccp);
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dev_info = cpu_to_le32((DBC_VENDOR_ID << 16) | DBC_PROTOCOL);
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writel(dev_info, &dbc->regs->devinfo1);
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dev_info = cpu_to_le32((DBC_DEVICE_REV << 16) | DBC_PRODUCT_ID);
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writel(dev_info, &dbc->regs->devinfo2);
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}
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static void xhci_dbc_giveback(struct dbc_request *req, int status)
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__releases(&dbc->lock)
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__acquires(&dbc->lock)
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{
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struct xhci_dbc *dbc = req->dbc;
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struct device *dev = dbc->dev;
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list_del_init(&req->list_pending);
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req->trb_dma = 0;
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req->trb = NULL;
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if (req->status == -EINPROGRESS)
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req->status = status;
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trace_xhci_dbc_giveback_request(req);
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dma_unmap_single(dev,
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req->dma,
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req->length,
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dbc_ep_dma_direction(req));
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/* Give back the transfer request: */
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spin_unlock(&dbc->lock);
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req->complete(dbc, req);
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spin_lock(&dbc->lock);
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}
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static void xhci_dbc_flush_single_request(struct dbc_request *req)
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{
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union xhci_trb *trb = req->trb;
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trb->generic.field[0] = 0;
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trb->generic.field[1] = 0;
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trb->generic.field[2] = 0;
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trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
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trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(TRB_TR_NOOP));
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xhci_dbc_giveback(req, -ESHUTDOWN);
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}
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static void xhci_dbc_flush_endpoint_requests(struct dbc_ep *dep)
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{
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struct dbc_request *req, *tmp;
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list_for_each_entry_safe(req, tmp, &dep->list_pending, list_pending)
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xhci_dbc_flush_single_request(req);
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}
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static void xhci_dbc_flush_requests(struct xhci_dbc *dbc)
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{
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xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_OUT]);
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xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_IN]);
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}
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struct dbc_request *
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dbc_alloc_request(struct xhci_dbc *dbc, unsigned int direction, gfp_t flags)
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{
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struct dbc_request *req;
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if (direction != BULK_IN &&
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direction != BULK_OUT)
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return NULL;
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if (!dbc)
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return NULL;
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req = kzalloc(sizeof(*req), flags);
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if (!req)
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return NULL;
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req->dbc = dbc;
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INIT_LIST_HEAD(&req->list_pending);
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INIT_LIST_HEAD(&req->list_pool);
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req->direction = direction;
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trace_xhci_dbc_alloc_request(req);
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return req;
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}
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void
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dbc_free_request(struct dbc_request *req)
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{
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trace_xhci_dbc_free_request(req);
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kfree(req);
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}
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static void
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xhci_dbc_queue_trb(struct xhci_ring *ring, u32 field1,
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u32 field2, u32 field3, u32 field4)
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{
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union xhci_trb *trb, *next;
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trb = ring->enqueue;
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trb->generic.field[0] = cpu_to_le32(field1);
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trb->generic.field[1] = cpu_to_le32(field2);
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trb->generic.field[2] = cpu_to_le32(field3);
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trb->generic.field[3] = cpu_to_le32(field4);
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trace_xhci_dbc_gadget_ep_queue(ring, &trb->generic);
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ring->num_trbs_free--;
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next = ++(ring->enqueue);
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if (TRB_TYPE_LINK_LE32(next->link.control)) {
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next->link.control ^= cpu_to_le32(TRB_CYCLE);
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ring->enqueue = ring->enq_seg->trbs;
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ring->cycle_state ^= 1;
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}
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}
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static int xhci_dbc_queue_bulk_tx(struct dbc_ep *dep,
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struct dbc_request *req)
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{
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u64 addr;
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union xhci_trb *trb;
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unsigned int num_trbs;
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struct xhci_dbc *dbc = req->dbc;
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struct xhci_ring *ring = dep->ring;
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u32 length, control, cycle;
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num_trbs = count_trbs(req->dma, req->length);
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WARN_ON(num_trbs != 1);
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if (ring->num_trbs_free < num_trbs)
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return -EBUSY;
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addr = req->dma;
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trb = ring->enqueue;
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cycle = ring->cycle_state;
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length = TRB_LEN(req->length);
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control = TRB_TYPE(TRB_NORMAL) | TRB_IOC;
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if (cycle)
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control &= cpu_to_le32(~TRB_CYCLE);
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else
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control |= cpu_to_le32(TRB_CYCLE);
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req->trb = ring->enqueue;
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req->trb_dma = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
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xhci_dbc_queue_trb(ring,
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lower_32_bits(addr),
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upper_32_bits(addr),
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length, control);
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/*
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* Add a barrier between writes of trb fields and flipping
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* the cycle bit:
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*/
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wmb();
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if (cycle)
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trb->generic.field[3] |= cpu_to_le32(TRB_CYCLE);
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else
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trb->generic.field[3] &= cpu_to_le32(~TRB_CYCLE);
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writel(DBC_DOOR_BELL_TARGET(dep->direction), &dbc->regs->doorbell);
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return 0;
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}
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static int
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dbc_ep_do_queue(struct dbc_request *req)
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{
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int ret;
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struct xhci_dbc *dbc = req->dbc;
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struct device *dev = dbc->dev;
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struct dbc_ep *dep = &dbc->eps[req->direction];
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if (!req->length || !req->buf)
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return -EINVAL;
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req->actual = 0;
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req->status = -EINPROGRESS;
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req->dma = dma_map_single(dev,
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req->buf,
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req->length,
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dbc_ep_dma_direction(dep));
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if (dma_mapping_error(dev, req->dma)) {
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dev_err(dbc->dev, "failed to map buffer\n");
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return -EFAULT;
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}
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ret = xhci_dbc_queue_bulk_tx(dep, req);
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if (ret) {
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dev_err(dbc->dev, "failed to queue trbs\n");
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dma_unmap_single(dev,
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req->dma,
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req->length,
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dbc_ep_dma_direction(dep));
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return -EFAULT;
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}
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list_add_tail(&req->list_pending, &dep->list_pending);
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return 0;
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}
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int dbc_ep_queue(struct dbc_request *req)
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{
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unsigned long flags;
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struct xhci_dbc *dbc = req->dbc;
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int ret = -ESHUTDOWN;
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if (!dbc)
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return -ENODEV;
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if (req->direction != BULK_IN &&
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req->direction != BULK_OUT)
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return -EINVAL;
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spin_lock_irqsave(&dbc->lock, flags);
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if (dbc->state == DS_CONFIGURED)
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ret = dbc_ep_do_queue(req);
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spin_unlock_irqrestore(&dbc->lock, flags);
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mod_delayed_work(system_wq, &dbc->event_work, 0);
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trace_xhci_dbc_queue_request(req);
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return ret;
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}
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static inline void xhci_dbc_do_eps_init(struct xhci_dbc *dbc, bool direction)
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{
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struct dbc_ep *dep;
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dep = &dbc->eps[direction];
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dep->dbc = dbc;
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dep->direction = direction;
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dep->ring = direction ? dbc->ring_in : dbc->ring_out;
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INIT_LIST_HEAD(&dep->list_pending);
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}
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static void xhci_dbc_eps_init(struct xhci_dbc *dbc)
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{
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xhci_dbc_do_eps_init(dbc, BULK_OUT);
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xhci_dbc_do_eps_init(dbc, BULK_IN);
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}
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static void xhci_dbc_eps_exit(struct xhci_dbc *dbc)
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{
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memset(dbc->eps, 0, sizeof(struct dbc_ep) * ARRAY_SIZE(dbc->eps));
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}
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static int dbc_erst_alloc(struct device *dev, struct xhci_ring *evt_ring,
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struct xhci_erst *erst, gfp_t flags)
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{
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erst->entries = dma_alloc_coherent(dev, sizeof(struct xhci_erst_entry),
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&erst->erst_dma_addr, flags);
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if (!erst->entries)
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return -ENOMEM;
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erst->num_entries = 1;
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erst->entries[0].seg_addr = cpu_to_le64(evt_ring->first_seg->dma);
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erst->entries[0].seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
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erst->entries[0].rsvd = 0;
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return 0;
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}
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static void dbc_erst_free(struct device *dev, struct xhci_erst *erst)
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{
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if (erst->entries)
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dma_free_coherent(dev, sizeof(struct xhci_erst_entry),
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erst->entries, erst->erst_dma_addr);
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erst->entries = NULL;
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}
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static struct xhci_container_ctx *
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dbc_alloc_ctx(struct device *dev, gfp_t flags)
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{
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struct xhci_container_ctx *ctx;
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ctx = kzalloc(sizeof(*ctx), flags);
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if (!ctx)
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return NULL;
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/* xhci 7.6.9, all three contexts; info, ep-out and ep-in. Each 64 bytes*/
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ctx->size = 3 * DBC_CONTEXT_SIZE;
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ctx->bytes = dma_alloc_coherent(dev, ctx->size, &ctx->dma, flags);
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if (!ctx->bytes) {
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kfree(ctx);
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return NULL;
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}
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return ctx;
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}
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static struct xhci_ring *
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xhci_dbc_ring_alloc(struct device *dev, enum xhci_ring_type type, gfp_t flags)
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{
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struct xhci_ring *ring;
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struct xhci_segment *seg;
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dma_addr_t dma;
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ring = kzalloc(sizeof(*ring), flags);
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if (!ring)
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return NULL;
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ring->num_segs = 1;
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ring->type = type;
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seg = kzalloc(sizeof(*seg), flags);
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if (!seg)
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goto seg_fail;
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ring->first_seg = seg;
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ring->last_seg = seg;
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seg->next = seg;
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seg->trbs = dma_alloc_coherent(dev, TRB_SEGMENT_SIZE, &dma, flags);
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if (!seg->trbs)
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goto dma_fail;
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seg->dma = dma;
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/* Only event ring does not use link TRB */
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if (type != TYPE_EVENT) {
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union xhci_trb *trb = &seg->trbs[TRBS_PER_SEGMENT - 1];
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trb->link.segment_ptr = cpu_to_le64(dma);
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trb->link.control = cpu_to_le32(LINK_TOGGLE | TRB_TYPE(TRB_LINK));
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}
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INIT_LIST_HEAD(&ring->td_list);
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xhci_initialize_ring_info(ring, 1);
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return ring;
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dma_fail:
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kfree(seg);
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seg_fail:
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kfree(ring);
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return NULL;
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}
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static int xhci_dbc_mem_init(struct xhci_dbc *dbc, gfp_t flags)
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{
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int ret;
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dma_addr_t deq;
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u32 string_length;
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struct device *dev = dbc->dev;
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/* Allocate various rings for events and transfers: */
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dbc->ring_evt = xhci_dbc_ring_alloc(dev, TYPE_EVENT, flags);
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if (!dbc->ring_evt)
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goto evt_fail;
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dbc->ring_in = xhci_dbc_ring_alloc(dev, TYPE_BULK, flags);
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if (!dbc->ring_in)
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goto in_fail;
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dbc->ring_out = xhci_dbc_ring_alloc(dev, TYPE_BULK, flags);
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if (!dbc->ring_out)
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goto out_fail;
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/* Allocate and populate ERST: */
|
|
ret = dbc_erst_alloc(dev, dbc->ring_evt, &dbc->erst, flags);
|
|
if (ret)
|
|
goto erst_fail;
|
|
|
|
/* Allocate context data structure: */
|
|
dbc->ctx = dbc_alloc_ctx(dev, flags); /* was sysdev, and is still */
|
|
if (!dbc->ctx)
|
|
goto ctx_fail;
|
|
|
|
/* Allocate the string table: */
|
|
dbc->string_size = sizeof(struct dbc_str_descs);
|
|
dbc->string = dma_alloc_coherent(dev, dbc->string_size,
|
|
&dbc->string_dma, flags);
|
|
if (!dbc->string)
|
|
goto string_fail;
|
|
|
|
/* Setup ERST register: */
|
|
writel(dbc->erst.erst_size, &dbc->regs->ersts);
|
|
|
|
lo_hi_writeq(dbc->erst.erst_dma_addr, &dbc->regs->erstba);
|
|
deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
|
|
dbc->ring_evt->dequeue);
|
|
lo_hi_writeq(deq, &dbc->regs->erdp);
|
|
|
|
/* Setup strings and contexts: */
|
|
string_length = xhci_dbc_populate_strings(dbc->string);
|
|
xhci_dbc_init_contexts(dbc, string_length);
|
|
|
|
xhci_dbc_eps_init(dbc);
|
|
dbc->state = DS_INITIALIZED;
|
|
|
|
return 0;
|
|
|
|
string_fail:
|
|
dbc_free_ctx(dev, dbc->ctx);
|
|
dbc->ctx = NULL;
|
|
ctx_fail:
|
|
dbc_erst_free(dev, &dbc->erst);
|
|
erst_fail:
|
|
dbc_ring_free(dev, dbc->ring_out);
|
|
dbc->ring_out = NULL;
|
|
out_fail:
|
|
dbc_ring_free(dev, dbc->ring_in);
|
|
dbc->ring_in = NULL;
|
|
in_fail:
|
|
dbc_ring_free(dev, dbc->ring_evt);
|
|
dbc->ring_evt = NULL;
|
|
evt_fail:
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static void xhci_dbc_mem_cleanup(struct xhci_dbc *dbc)
|
|
{
|
|
if (!dbc)
|
|
return;
|
|
|
|
xhci_dbc_eps_exit(dbc);
|
|
|
|
if (dbc->string) {
|
|
dma_free_coherent(dbc->dev, dbc->string_size,
|
|
dbc->string, dbc->string_dma);
|
|
dbc->string = NULL;
|
|
}
|
|
|
|
dbc_free_ctx(dbc->dev, dbc->ctx);
|
|
dbc->ctx = NULL;
|
|
|
|
dbc_erst_free(dbc->dev, &dbc->erst);
|
|
dbc_ring_free(dbc->dev, dbc->ring_out);
|
|
dbc_ring_free(dbc->dev, dbc->ring_in);
|
|
dbc_ring_free(dbc->dev, dbc->ring_evt);
|
|
dbc->ring_in = NULL;
|
|
dbc->ring_out = NULL;
|
|
dbc->ring_evt = NULL;
|
|
}
|
|
|
|
static int xhci_do_dbc_start(struct xhci_dbc *dbc)
|
|
{
|
|
int ret;
|
|
u32 ctrl;
|
|
|
|
if (dbc->state != DS_DISABLED)
|
|
return -EINVAL;
|
|
|
|
writel(0, &dbc->regs->control);
|
|
ret = xhci_handshake(&dbc->regs->control,
|
|
DBC_CTRL_DBC_ENABLE,
|
|
0, 1000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = xhci_dbc_mem_init(dbc, GFP_ATOMIC);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ctrl = readl(&dbc->regs->control);
|
|
writel(ctrl | DBC_CTRL_DBC_ENABLE | DBC_CTRL_PORT_ENABLE,
|
|
&dbc->regs->control);
|
|
ret = xhci_handshake(&dbc->regs->control,
|
|
DBC_CTRL_DBC_ENABLE,
|
|
DBC_CTRL_DBC_ENABLE, 1000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dbc->state = DS_ENABLED;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int xhci_do_dbc_stop(struct xhci_dbc *dbc)
|
|
{
|
|
if (dbc->state == DS_DISABLED)
|
|
return -1;
|
|
|
|
writel(0, &dbc->regs->control);
|
|
dbc->state = DS_DISABLED;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int xhci_dbc_start(struct xhci_dbc *dbc)
|
|
{
|
|
int ret;
|
|
unsigned long flags;
|
|
|
|
WARN_ON(!dbc);
|
|
|
|
pm_runtime_get_sync(dbc->dev); /* note this was self.controller */
|
|
|
|
spin_lock_irqsave(&dbc->lock, flags);
|
|
ret = xhci_do_dbc_start(dbc);
|
|
spin_unlock_irqrestore(&dbc->lock, flags);
|
|
|
|
if (ret) {
|
|
pm_runtime_put(dbc->dev); /* note this was self.controller */
|
|
return ret;
|
|
}
|
|
|
|
return mod_delayed_work(system_wq, &dbc->event_work, 1);
|
|
}
|
|
|
|
static void xhci_dbc_stop(struct xhci_dbc *dbc)
|
|
{
|
|
int ret;
|
|
unsigned long flags;
|
|
|
|
WARN_ON(!dbc);
|
|
|
|
switch (dbc->state) {
|
|
case DS_DISABLED:
|
|
return;
|
|
case DS_CONFIGURED:
|
|
case DS_STALLED:
|
|
if (dbc->driver->disconnect)
|
|
dbc->driver->disconnect(dbc);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
cancel_delayed_work_sync(&dbc->event_work);
|
|
|
|
spin_lock_irqsave(&dbc->lock, flags);
|
|
ret = xhci_do_dbc_stop(dbc);
|
|
spin_unlock_irqrestore(&dbc->lock, flags);
|
|
|
|
if (!ret) {
|
|
xhci_dbc_mem_cleanup(dbc);
|
|
pm_runtime_put_sync(dbc->dev); /* note, was self.controller */
|
|
}
|
|
}
|
|
|
|
static void
|
|
dbc_handle_port_status(struct xhci_dbc *dbc, union xhci_trb *event)
|
|
{
|
|
u32 portsc;
|
|
|
|
portsc = readl(&dbc->regs->portsc);
|
|
if (portsc & DBC_PORTSC_CONN_CHANGE)
|
|
dev_info(dbc->dev, "DbC port connect change\n");
|
|
|
|
if (portsc & DBC_PORTSC_RESET_CHANGE)
|
|
dev_info(dbc->dev, "DbC port reset change\n");
|
|
|
|
if (portsc & DBC_PORTSC_LINK_CHANGE)
|
|
dev_info(dbc->dev, "DbC port link status change\n");
|
|
|
|
if (portsc & DBC_PORTSC_CONFIG_CHANGE)
|
|
dev_info(dbc->dev, "DbC config error change\n");
|
|
|
|
/* Port reset change bit will be cleared in other place: */
|
|
writel(portsc & ~DBC_PORTSC_RESET_CHANGE, &dbc->regs->portsc);
|
|
}
|
|
|
|
static void dbc_handle_xfer_event(struct xhci_dbc *dbc, union xhci_trb *event)
|
|
{
|
|
struct dbc_ep *dep;
|
|
struct xhci_ring *ring;
|
|
int ep_id;
|
|
int status;
|
|
u32 comp_code;
|
|
size_t remain_length;
|
|
struct dbc_request *req = NULL, *r;
|
|
|
|
comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2]));
|
|
remain_length = EVENT_TRB_LEN(le32_to_cpu(event->generic.field[2]));
|
|
ep_id = TRB_TO_EP_ID(le32_to_cpu(event->generic.field[3]));
|
|
dep = (ep_id == EPID_OUT) ?
|
|
get_out_ep(dbc) : get_in_ep(dbc);
|
|
ring = dep->ring;
|
|
|
|
switch (comp_code) {
|
|
case COMP_SUCCESS:
|
|
remain_length = 0;
|
|
fallthrough;
|
|
case COMP_SHORT_PACKET:
|
|
status = 0;
|
|
break;
|
|
case COMP_TRB_ERROR:
|
|
case COMP_BABBLE_DETECTED_ERROR:
|
|
case COMP_USB_TRANSACTION_ERROR:
|
|
case COMP_STALL_ERROR:
|
|
dev_warn(dbc->dev, "tx error %d detected\n", comp_code);
|
|
status = -comp_code;
|
|
break;
|
|
default:
|
|
dev_err(dbc->dev, "unknown tx error %d\n", comp_code);
|
|
status = -comp_code;
|
|
break;
|
|
}
|
|
|
|
/* Match the pending request: */
|
|
list_for_each_entry(r, &dep->list_pending, list_pending) {
|
|
if (r->trb_dma == event->trans_event.buffer) {
|
|
req = r;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!req) {
|
|
dev_warn(dbc->dev, "no matched request\n");
|
|
return;
|
|
}
|
|
|
|
trace_xhci_dbc_handle_transfer(ring, &req->trb->generic);
|
|
|
|
ring->num_trbs_free++;
|
|
req->actual = req->length - remain_length;
|
|
xhci_dbc_giveback(req, status);
|
|
}
|
|
|
|
static void inc_evt_deq(struct xhci_ring *ring)
|
|
{
|
|
/* If on the last TRB of the segment go back to the beginning */
|
|
if (ring->dequeue == &ring->deq_seg->trbs[TRBS_PER_SEGMENT - 1]) {
|
|
ring->cycle_state ^= 1;
|
|
ring->dequeue = ring->deq_seg->trbs;
|
|
return;
|
|
}
|
|
ring->dequeue++;
|
|
}
|
|
|
|
static enum evtreturn xhci_dbc_do_handle_events(struct xhci_dbc *dbc)
|
|
{
|
|
dma_addr_t deq;
|
|
struct dbc_ep *dep;
|
|
union xhci_trb *evt;
|
|
u32 ctrl, portsc;
|
|
bool update_erdp = false;
|
|
|
|
/* DbC state machine: */
|
|
switch (dbc->state) {
|
|
case DS_DISABLED:
|
|
case DS_INITIALIZED:
|
|
|
|
return EVT_ERR;
|
|
case DS_ENABLED:
|
|
portsc = readl(&dbc->regs->portsc);
|
|
if (portsc & DBC_PORTSC_CONN_STATUS) {
|
|
dbc->state = DS_CONNECTED;
|
|
dev_info(dbc->dev, "DbC connected\n");
|
|
}
|
|
|
|
return EVT_DONE;
|
|
case DS_CONNECTED:
|
|
ctrl = readl(&dbc->regs->control);
|
|
if (ctrl & DBC_CTRL_DBC_RUN) {
|
|
dbc->state = DS_CONFIGURED;
|
|
dev_info(dbc->dev, "DbC configured\n");
|
|
portsc = readl(&dbc->regs->portsc);
|
|
writel(portsc, &dbc->regs->portsc);
|
|
return EVT_GSER;
|
|
}
|
|
|
|
return EVT_DONE;
|
|
case DS_CONFIGURED:
|
|
/* Handle cable unplug event: */
|
|
portsc = readl(&dbc->regs->portsc);
|
|
if (!(portsc & DBC_PORTSC_PORT_ENABLED) &&
|
|
!(portsc & DBC_PORTSC_CONN_STATUS)) {
|
|
dev_info(dbc->dev, "DbC cable unplugged\n");
|
|
dbc->state = DS_ENABLED;
|
|
xhci_dbc_flush_requests(dbc);
|
|
|
|
return EVT_DISC;
|
|
}
|
|
|
|
/* Handle debug port reset event: */
|
|
if (portsc & DBC_PORTSC_RESET_CHANGE) {
|
|
dev_info(dbc->dev, "DbC port reset\n");
|
|
writel(portsc, &dbc->regs->portsc);
|
|
dbc->state = DS_ENABLED;
|
|
xhci_dbc_flush_requests(dbc);
|
|
|
|
return EVT_DISC;
|
|
}
|
|
|
|
/* Handle endpoint stall event: */
|
|
ctrl = readl(&dbc->regs->control);
|
|
if ((ctrl & DBC_CTRL_HALT_IN_TR) ||
|
|
(ctrl & DBC_CTRL_HALT_OUT_TR)) {
|
|
dev_info(dbc->dev, "DbC Endpoint stall\n");
|
|
dbc->state = DS_STALLED;
|
|
|
|
if (ctrl & DBC_CTRL_HALT_IN_TR) {
|
|
dep = get_in_ep(dbc);
|
|
xhci_dbc_flush_endpoint_requests(dep);
|
|
}
|
|
|
|
if (ctrl & DBC_CTRL_HALT_OUT_TR) {
|
|
dep = get_out_ep(dbc);
|
|
xhci_dbc_flush_endpoint_requests(dep);
|
|
}
|
|
|
|
return EVT_DONE;
|
|
}
|
|
|
|
/* Clear DbC run change bit: */
|
|
if (ctrl & DBC_CTRL_DBC_RUN_CHANGE) {
|
|
writel(ctrl, &dbc->regs->control);
|
|
ctrl = readl(&dbc->regs->control);
|
|
}
|
|
|
|
break;
|
|
case DS_STALLED:
|
|
ctrl = readl(&dbc->regs->control);
|
|
if (!(ctrl & DBC_CTRL_HALT_IN_TR) &&
|
|
!(ctrl & DBC_CTRL_HALT_OUT_TR) &&
|
|
(ctrl & DBC_CTRL_DBC_RUN)) {
|
|
dbc->state = DS_CONFIGURED;
|
|
break;
|
|
}
|
|
|
|
return EVT_DONE;
|
|
default:
|
|
dev_err(dbc->dev, "Unknown DbC state %d\n", dbc->state);
|
|
break;
|
|
}
|
|
|
|
/* Handle the events in the event ring: */
|
|
evt = dbc->ring_evt->dequeue;
|
|
while ((le32_to_cpu(evt->event_cmd.flags) & TRB_CYCLE) ==
|
|
dbc->ring_evt->cycle_state) {
|
|
/*
|
|
* Add a barrier between reading the cycle flag and any
|
|
* reads of the event's flags/data below:
|
|
*/
|
|
rmb();
|
|
|
|
trace_xhci_dbc_handle_event(dbc->ring_evt, &evt->generic);
|
|
|
|
switch (le32_to_cpu(evt->event_cmd.flags) & TRB_TYPE_BITMASK) {
|
|
case TRB_TYPE(TRB_PORT_STATUS):
|
|
dbc_handle_port_status(dbc, evt);
|
|
break;
|
|
case TRB_TYPE(TRB_TRANSFER):
|
|
dbc_handle_xfer_event(dbc, evt);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
inc_evt_deq(dbc->ring_evt);
|
|
|
|
evt = dbc->ring_evt->dequeue;
|
|
update_erdp = true;
|
|
}
|
|
|
|
/* Update event ring dequeue pointer: */
|
|
if (update_erdp) {
|
|
deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
|
|
dbc->ring_evt->dequeue);
|
|
lo_hi_writeq(deq, &dbc->regs->erdp);
|
|
}
|
|
|
|
return EVT_DONE;
|
|
}
|
|
|
|
static void xhci_dbc_handle_events(struct work_struct *work)
|
|
{
|
|
enum evtreturn evtr;
|
|
struct xhci_dbc *dbc;
|
|
unsigned long flags;
|
|
|
|
dbc = container_of(to_delayed_work(work), struct xhci_dbc, event_work);
|
|
|
|
spin_lock_irqsave(&dbc->lock, flags);
|
|
evtr = xhci_dbc_do_handle_events(dbc);
|
|
spin_unlock_irqrestore(&dbc->lock, flags);
|
|
|
|
switch (evtr) {
|
|
case EVT_GSER:
|
|
if (dbc->driver->configure)
|
|
dbc->driver->configure(dbc);
|
|
break;
|
|
case EVT_DISC:
|
|
if (dbc->driver->disconnect)
|
|
dbc->driver->disconnect(dbc);
|
|
break;
|
|
case EVT_DONE:
|
|
break;
|
|
default:
|
|
dev_info(dbc->dev, "stop handling dbc events\n");
|
|
return;
|
|
}
|
|
|
|
mod_delayed_work(system_wq, &dbc->event_work, 1);
|
|
}
|
|
|
|
static void xhci_do_dbc_exit(struct xhci_hcd *xhci)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
kfree(xhci->dbc);
|
|
xhci->dbc = NULL;
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
}
|
|
|
|
static int xhci_do_dbc_init(struct xhci_hcd *xhci)
|
|
{
|
|
u32 reg;
|
|
struct xhci_dbc *dbc;
|
|
unsigned long flags;
|
|
void __iomem *base;
|
|
int dbc_cap_offs;
|
|
|
|
base = &xhci->cap_regs->hc_capbase;
|
|
dbc_cap_offs = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_DEBUG);
|
|
if (!dbc_cap_offs)
|
|
return -ENODEV;
|
|
|
|
dbc = kzalloc(sizeof(*dbc), GFP_KERNEL);
|
|
if (!dbc)
|
|
return -ENOMEM;
|
|
|
|
dbc->regs = base + dbc_cap_offs;
|
|
|
|
/* We will avoid using DbC in xhci driver if it's in use. */
|
|
reg = readl(&dbc->regs->control);
|
|
if (reg & DBC_CTRL_DBC_ENABLE) {
|
|
kfree(dbc);
|
|
return -EBUSY;
|
|
}
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
if (xhci->dbc) {
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
kfree(dbc);
|
|
return -EBUSY;
|
|
}
|
|
xhci->dbc = dbc;
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
dbc->xhci = xhci;
|
|
dbc->dev = xhci_to_hcd(xhci)->self.sysdev;
|
|
INIT_DELAYED_WORK(&dbc->event_work, xhci_dbc_handle_events);
|
|
spin_lock_init(&dbc->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t dbc_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
const char *p;
|
|
struct xhci_dbc *dbc;
|
|
struct xhci_hcd *xhci;
|
|
|
|
xhci = hcd_to_xhci(dev_get_drvdata(dev));
|
|
dbc = xhci->dbc;
|
|
|
|
switch (dbc->state) {
|
|
case DS_DISABLED:
|
|
p = "disabled";
|
|
break;
|
|
case DS_INITIALIZED:
|
|
p = "initialized";
|
|
break;
|
|
case DS_ENABLED:
|
|
p = "enabled";
|
|
break;
|
|
case DS_CONNECTED:
|
|
p = "connected";
|
|
break;
|
|
case DS_CONFIGURED:
|
|
p = "configured";
|
|
break;
|
|
case DS_STALLED:
|
|
p = "stalled";
|
|
break;
|
|
default:
|
|
p = "unknown";
|
|
}
|
|
|
|
return sprintf(buf, "%s\n", p);
|
|
}
|
|
|
|
static ssize_t dbc_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct xhci_hcd *xhci;
|
|
struct xhci_dbc *dbc;
|
|
|
|
xhci = hcd_to_xhci(dev_get_drvdata(dev));
|
|
dbc = xhci->dbc;
|
|
|
|
if (!strncmp(buf, "enable", 6))
|
|
xhci_dbc_start(dbc);
|
|
else if (!strncmp(buf, "disable", 7))
|
|
xhci_dbc_stop(dbc);
|
|
else
|
|
return -EINVAL;
|
|
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR_RW(dbc);
|
|
|
|
int xhci_dbc_init(struct xhci_hcd *xhci)
|
|
{
|
|
int ret;
|
|
struct device *dev = xhci_to_hcd(xhci)->self.controller;
|
|
|
|
ret = xhci_do_dbc_init(xhci);
|
|
if (ret)
|
|
goto init_err3;
|
|
|
|
ret = xhci_dbc_tty_probe(xhci);
|
|
if (ret)
|
|
goto init_err2;
|
|
|
|
ret = device_create_file(dev, &dev_attr_dbc);
|
|
if (ret)
|
|
goto init_err1;
|
|
|
|
return 0;
|
|
|
|
init_err1:
|
|
xhci_dbc_tty_remove(xhci->dbc);
|
|
init_err2:
|
|
xhci_do_dbc_exit(xhci);
|
|
init_err3:
|
|
return ret;
|
|
}
|
|
|
|
void xhci_dbc_exit(struct xhci_hcd *xhci)
|
|
{
|
|
struct device *dev = xhci_to_hcd(xhci)->self.controller;
|
|
|
|
if (!xhci->dbc)
|
|
return;
|
|
|
|
device_remove_file(dev, &dev_attr_dbc);
|
|
xhci_dbc_tty_remove(xhci->dbc);
|
|
xhci_dbc_stop(xhci->dbc);
|
|
xhci_do_dbc_exit(xhci);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
int xhci_dbc_suspend(struct xhci_hcd *xhci)
|
|
{
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
if (!dbc)
|
|
return 0;
|
|
|
|
if (dbc->state == DS_CONFIGURED)
|
|
dbc->resume_required = 1;
|
|
|
|
xhci_dbc_stop(dbc);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int xhci_dbc_resume(struct xhci_hcd *xhci)
|
|
{
|
|
int ret = 0;
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
if (!dbc)
|
|
return 0;
|
|
|
|
if (dbc->resume_required) {
|
|
dbc->resume_required = 0;
|
|
xhci_dbc_start(dbc);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#endif /* CONFIG_PM */
|