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![Alexander Shiyan](/assets/img/avatar_default.png)
This patch adds WEIM support for all i.MX CPUs supported by the kernel. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
157 lines
3.8 KiB
C
157 lines
3.8 KiB
C
/*
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* EIM driver for Freescale's i.MX chips
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*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of_device.h>
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struct imx_weim_devtype {
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unsigned int cs_count;
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unsigned int cs_regs_count;
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unsigned int cs_stride;
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};
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static const struct imx_weim_devtype imx1_weim_devtype = {
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.cs_count = 6,
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.cs_regs_count = 2,
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.cs_stride = 0x08,
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};
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static const struct imx_weim_devtype imx27_weim_devtype = {
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.cs_count = 6,
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.cs_regs_count = 3,
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.cs_stride = 0x10,
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};
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static const struct imx_weim_devtype imx50_weim_devtype = {
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.cs_count = 4,
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.cs_regs_count = 6,
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.cs_stride = 0x18,
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};
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static const struct imx_weim_devtype imx51_weim_devtype = {
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.cs_count = 6,
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.cs_regs_count = 6,
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.cs_stride = 0x18,
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};
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static const struct of_device_id weim_id_table[] = {
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/* i.MX1/21 */
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{ .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
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/* i.MX25/27/31/35 */
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{ .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
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/* i.MX50/53/6Q */
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{ .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
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{ .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
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/* i.MX51 */
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{ .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
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{ }
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};
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MODULE_DEVICE_TABLE(of, weim_id_table);
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/* Parse and set the timing for this device. */
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static int __init weim_timing_setup(struct device_node *np, void __iomem *base,
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const struct imx_weim_devtype *devtype)
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{
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u32 cs_idx, value[devtype->cs_regs_count];
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int i, ret;
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/* get the CS index from this child node's "reg" property. */
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ret = of_property_read_u32(np, "reg", &cs_idx);
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if (ret)
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return ret;
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if (cs_idx >= devtype->cs_count)
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return -EINVAL;
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ret = of_property_read_u32_array(np, "fsl,weim-cs-timing",
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value, devtype->cs_regs_count);
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if (ret)
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return ret;
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/* set the timing for WEIM */
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for (i = 0; i < devtype->cs_regs_count; i++)
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writel(value[i], base + cs_idx * devtype->cs_stride + i * 4);
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return 0;
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}
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static int __init weim_parse_dt(struct platform_device *pdev,
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void __iomem *base)
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{
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const struct of_device_id *of_id = of_match_device(weim_id_table,
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&pdev->dev);
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const struct imx_weim_devtype *devtype = of_id->data;
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struct device_node *child;
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int ret;
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for_each_child_of_node(pdev->dev.of_node, child) {
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if (!child->name)
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continue;
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ret = weim_timing_setup(child, base, devtype);
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if (ret) {
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dev_err(&pdev->dev, "%s set timing failed.\n",
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child->full_name);
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return ret;
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}
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}
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ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
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if (ret)
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dev_err(&pdev->dev, "%s fail to create devices.\n",
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pdev->dev.of_node->full_name);
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return ret;
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}
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static int __init weim_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct clk *clk;
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void __iomem *base;
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int ret;
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/* get the resource */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(base))
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return PTR_ERR(base);
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/* get the clock */
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clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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ret = clk_prepare_enable(clk);
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if (ret)
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return ret;
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/* parse the device node */
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ret = weim_parse_dt(pdev, base);
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if (ret)
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clk_disable_unprepare(clk);
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else
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dev_info(&pdev->dev, "Driver registered.\n");
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return ret;
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}
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static struct platform_driver weim_driver = {
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.driver = {
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.name = "imx-weim",
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.owner = THIS_MODULE,
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.of_match_table = weim_id_table,
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},
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};
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module_platform_driver_probe(weim_driver, weim_probe);
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MODULE_AUTHOR("Freescale Semiconductor Inc.");
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MODULE_DESCRIPTION("i.MX EIM Controller Driver");
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MODULE_LICENSE("GPL");
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