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![Geert Uytterhoeven](/assets/img/avatar_default.png)
If both CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME are not set: drivers/video/sh_mobile_meram.c:573: warning: ‘sh_mobile_meram_suspend’ defined but not used drivers/video/sh_mobile_meram.c:597: warning: ‘sh_mobile_meram_resume’ defined but not used Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
759 lines
20 KiB
C
759 lines
20 KiB
C
/*
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* SuperH Mobile MERAM Driver for SuperH Mobile LCDC Driver
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*
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* Copyright (c) 2011 Damian Hobson-Garcia <dhobsong@igel.co.jp>
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* Takanari Hayama <taki@igel.co.jp>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <linux/genalloc.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <video/sh_mobile_meram.h>
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/* -----------------------------------------------------------------------------
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* MERAM registers
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*/
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#define MEVCR1 0x4
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#define MEVCR1_RST (1 << 31)
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#define MEVCR1_WD (1 << 30)
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#define MEVCR1_AMD1 (1 << 29)
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#define MEVCR1_AMD0 (1 << 28)
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#define MEQSEL1 0x40
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#define MEQSEL2 0x44
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#define MExxCTL 0x400
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#define MExxCTL_BV (1 << 31)
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#define MExxCTL_BSZ_SHIFT 28
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#define MExxCTL_MSAR_MASK (0x7ff << MExxCTL_MSAR_SHIFT)
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#define MExxCTL_MSAR_SHIFT 16
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#define MExxCTL_NXT_MASK (0x1f << MExxCTL_NXT_SHIFT)
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#define MExxCTL_NXT_SHIFT 11
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#define MExxCTL_WD1 (1 << 10)
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#define MExxCTL_WD0 (1 << 9)
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#define MExxCTL_WS (1 << 8)
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#define MExxCTL_CB (1 << 7)
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#define MExxCTL_WBF (1 << 6)
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#define MExxCTL_WF (1 << 5)
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#define MExxCTL_RF (1 << 4)
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#define MExxCTL_CM (1 << 3)
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#define MExxCTL_MD_READ (1 << 0)
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#define MExxCTL_MD_WRITE (2 << 0)
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#define MExxCTL_MD_ICB_WB (3 << 0)
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#define MExxCTL_MD_ICB (4 << 0)
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#define MExxCTL_MD_FB (7 << 0)
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#define MExxCTL_MD_MASK (7 << 0)
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#define MExxBSIZE 0x404
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#define MExxBSIZE_RCNT_SHIFT 28
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#define MExxBSIZE_YSZM1_SHIFT 16
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#define MExxBSIZE_XSZM1_SHIFT 0
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#define MExxMNCF 0x408
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#define MExxMNCF_KWBNM_SHIFT 28
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#define MExxMNCF_KRBNM_SHIFT 24
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#define MExxMNCF_BNM_SHIFT 16
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#define MExxMNCF_XBV (1 << 15)
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#define MExxMNCF_CPL_YCBCR444 (1 << 12)
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#define MExxMNCF_CPL_YCBCR420 (2 << 12)
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#define MExxMNCF_CPL_YCBCR422 (3 << 12)
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#define MExxMNCF_CPL_MSK (3 << 12)
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#define MExxMNCF_BL (1 << 2)
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#define MExxMNCF_LNM_SHIFT 0
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#define MExxSARA 0x410
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#define MExxSARB 0x414
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#define MExxSBSIZE 0x418
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#define MExxSBSIZE_HDV (1 << 31)
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#define MExxSBSIZE_HSZ16 (0 << 28)
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#define MExxSBSIZE_HSZ32 (1 << 28)
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#define MExxSBSIZE_HSZ64 (2 << 28)
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#define MExxSBSIZE_HSZ128 (3 << 28)
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#define MExxSBSIZE_SBSIZZ_SHIFT 0
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#define MERAM_MExxCTL_VAL(next, addr) \
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((((next) << MExxCTL_NXT_SHIFT) & MExxCTL_NXT_MASK) | \
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(((addr) << MExxCTL_MSAR_SHIFT) & MExxCTL_MSAR_MASK))
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#define MERAM_MExxBSIZE_VAL(rcnt, yszm1, xszm1) \
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(((rcnt) << MExxBSIZE_RCNT_SHIFT) | \
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((yszm1) << MExxBSIZE_YSZM1_SHIFT) | \
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((xszm1) << MExxBSIZE_XSZM1_SHIFT))
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static const unsigned long common_regs[] = {
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MEVCR1,
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MEQSEL1,
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MEQSEL2,
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};
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#define MERAM_REGS_SIZE ARRAY_SIZE(common_regs)
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static const unsigned long icb_regs[] = {
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MExxCTL,
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MExxBSIZE,
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MExxMNCF,
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MExxSARA,
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MExxSARB,
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MExxSBSIZE,
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};
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#define ICB_REGS_SIZE ARRAY_SIZE(icb_regs)
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/*
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* sh_mobile_meram_icb - MERAM ICB information
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* @regs: Registers cache
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* @index: ICB index
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* @offset: MERAM block offset
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* @size: MERAM block size in KiB
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* @cache_unit: Bytes to cache per ICB
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* @pixelformat: Video pixel format of the data stored in the ICB
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* @current_reg: Which of Start Address Register A (0) or B (1) is in use
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*/
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struct sh_mobile_meram_icb {
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unsigned long regs[ICB_REGS_SIZE];
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unsigned int index;
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unsigned long offset;
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unsigned int size;
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unsigned int cache_unit;
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unsigned int pixelformat;
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unsigned int current_reg;
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};
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#define MERAM_ICB_NUM 32
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struct sh_mobile_meram_fb_plane {
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struct sh_mobile_meram_icb *marker;
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struct sh_mobile_meram_icb *cache;
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};
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struct sh_mobile_meram_fb_cache {
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unsigned int nplanes;
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struct sh_mobile_meram_fb_plane planes[2];
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};
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/*
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* sh_mobile_meram_priv - MERAM device
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* @base: Registers base address
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* @meram: MERAM physical address
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* @regs: Registers cache
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* @lock: Protects used_icb and icbs
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* @used_icb: Bitmask of used ICBs
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* @icbs: ICBs
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* @pool: Allocation pool to manage the MERAM
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*/
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struct sh_mobile_meram_priv {
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void __iomem *base;
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unsigned long meram;
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unsigned long regs[MERAM_REGS_SIZE];
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struct mutex lock;
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unsigned long used_icb;
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struct sh_mobile_meram_icb icbs[MERAM_ICB_NUM];
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struct gen_pool *pool;
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};
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/* settings */
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#define MERAM_GRANULARITY 1024
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#define MERAM_SEC_LINE 15
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#define MERAM_LINE_WIDTH 2048
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/* -----------------------------------------------------------------------------
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* Registers access
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*/
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#define MERAM_ICB_OFFSET(base, idx, off) ((base) + (off) + (idx) * 0x20)
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static inline void meram_write_icb(void __iomem *base, unsigned int idx,
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unsigned int off, unsigned long val)
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{
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iowrite32(val, MERAM_ICB_OFFSET(base, idx, off));
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}
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static inline unsigned long meram_read_icb(void __iomem *base, unsigned int idx,
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unsigned int off)
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{
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return ioread32(MERAM_ICB_OFFSET(base, idx, off));
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}
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static inline void meram_write_reg(void __iomem *base, unsigned int off,
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unsigned long val)
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{
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iowrite32(val, base + off);
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}
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static inline unsigned long meram_read_reg(void __iomem *base, unsigned int off)
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{
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return ioread32(base + off);
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}
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/* -----------------------------------------------------------------------------
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* MERAM allocation and free
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*/
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static unsigned long meram_alloc(struct sh_mobile_meram_priv *priv, size_t size)
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{
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return gen_pool_alloc(priv->pool, size);
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}
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static void meram_free(struct sh_mobile_meram_priv *priv, unsigned long mem,
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size_t size)
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{
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gen_pool_free(priv->pool, mem, size);
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}
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/* -----------------------------------------------------------------------------
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* LCDC cache planes allocation, init, cleanup and free
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*/
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/* Allocate ICBs and MERAM for a plane. */
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static int meram_plane_alloc(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_fb_plane *plane,
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size_t size)
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{
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unsigned long mem;
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unsigned long idx;
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idx = find_first_zero_bit(&priv->used_icb, 28);
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if (idx == 28)
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return -ENOMEM;
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plane->cache = &priv->icbs[idx];
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idx = find_next_zero_bit(&priv->used_icb, 32, 28);
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if (idx == 32)
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return -ENOMEM;
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plane->marker = &priv->icbs[idx];
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mem = meram_alloc(priv, size * 1024);
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if (mem == 0)
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return -ENOMEM;
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__set_bit(plane->marker->index, &priv->used_icb);
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__set_bit(plane->cache->index, &priv->used_icb);
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plane->marker->offset = mem - priv->meram;
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plane->marker->size = size;
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return 0;
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}
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/* Free ICBs and MERAM for a plane. */
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static void meram_plane_free(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_fb_plane *plane)
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{
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meram_free(priv, priv->meram + plane->marker->offset,
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plane->marker->size * 1024);
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__clear_bit(plane->marker->index, &priv->used_icb);
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__clear_bit(plane->cache->index, &priv->used_icb);
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}
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/* Is this a YCbCr(NV12, NV16 or NV24) colorspace? */
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static int is_nvcolor(int cspace)
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{
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if (cspace == SH_MOBILE_MERAM_PF_NV ||
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cspace == SH_MOBILE_MERAM_PF_NV24)
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return 1;
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return 0;
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}
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/* Set the next address to fetch. */
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static void meram_set_next_addr(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_fb_cache *cache,
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unsigned long base_addr_y,
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unsigned long base_addr_c)
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{
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struct sh_mobile_meram_icb *icb = cache->planes[0].marker;
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unsigned long target;
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icb->current_reg ^= 1;
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target = icb->current_reg ? MExxSARB : MExxSARA;
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/* set the next address to fetch */
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meram_write_icb(priv->base, cache->planes[0].cache->index, target,
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base_addr_y);
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meram_write_icb(priv->base, cache->planes[0].marker->index, target,
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base_addr_y + cache->planes[0].marker->cache_unit);
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if (cache->nplanes == 2) {
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meram_write_icb(priv->base, cache->planes[1].cache->index,
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target, base_addr_c);
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meram_write_icb(priv->base, cache->planes[1].marker->index,
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target, base_addr_c +
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cache->planes[1].marker->cache_unit);
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}
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}
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/* Get the next ICB address. */
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static void
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meram_get_next_icb_addr(struct sh_mobile_meram_info *pdata,
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struct sh_mobile_meram_fb_cache *cache,
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unsigned long *icb_addr_y, unsigned long *icb_addr_c)
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{
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struct sh_mobile_meram_icb *icb = cache->planes[0].marker;
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unsigned long icb_offset;
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if (pdata->addr_mode == SH_MOBILE_MERAM_MODE0)
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icb_offset = 0x80000000 | (icb->current_reg << 29);
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else
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icb_offset = 0xc0000000 | (icb->current_reg << 23);
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*icb_addr_y = icb_offset | (cache->planes[0].marker->index << 24);
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if (cache->nplanes == 2)
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*icb_addr_c = icb_offset
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| (cache->planes[1].marker->index << 24);
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}
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#define MERAM_CALC_BYTECOUNT(x, y) \
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(((x) * (y) + (MERAM_LINE_WIDTH - 1)) & ~(MERAM_LINE_WIDTH - 1))
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/* Initialize MERAM. */
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static int meram_plane_init(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_fb_plane *plane,
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unsigned int xres, unsigned int yres,
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unsigned int *out_pitch)
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{
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struct sh_mobile_meram_icb *marker = plane->marker;
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unsigned long total_byte_count = MERAM_CALC_BYTECOUNT(xres, yres);
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unsigned long bnm;
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unsigned int lcdc_pitch;
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unsigned int xpitch;
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unsigned int line_cnt;
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unsigned int save_lines;
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/* adjust pitch to 1024, 2048, 4096 or 8192 */
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lcdc_pitch = (xres - 1) | 1023;
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lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 1);
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lcdc_pitch = lcdc_pitch | (lcdc_pitch >> 2);
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lcdc_pitch += 1;
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/* derive settings */
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if (lcdc_pitch == 8192 && yres >= 1024) {
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lcdc_pitch = xpitch = MERAM_LINE_WIDTH;
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line_cnt = total_byte_count >> 11;
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*out_pitch = xres;
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save_lines = plane->marker->size / 16 / MERAM_SEC_LINE;
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save_lines *= MERAM_SEC_LINE;
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} else {
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xpitch = xres;
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line_cnt = yres;
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*out_pitch = lcdc_pitch;
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save_lines = plane->marker->size / (lcdc_pitch >> 10) / 2;
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save_lines &= 0xff;
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}
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bnm = (save_lines - 1) << 16;
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/* TODO: we better to check if we have enough MERAM buffer size */
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/* set up ICB */
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meram_write_icb(priv->base, plane->cache->index, MExxBSIZE,
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MERAM_MExxBSIZE_VAL(0x0, line_cnt - 1, xpitch - 1));
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meram_write_icb(priv->base, plane->marker->index, MExxBSIZE,
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MERAM_MExxBSIZE_VAL(0xf, line_cnt - 1, xpitch - 1));
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meram_write_icb(priv->base, plane->cache->index, MExxMNCF, bnm);
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meram_write_icb(priv->base, plane->marker->index, MExxMNCF, bnm);
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meram_write_icb(priv->base, plane->cache->index, MExxSBSIZE, xpitch);
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meram_write_icb(priv->base, plane->marker->index, MExxSBSIZE, xpitch);
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/* save a cache unit size */
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plane->cache->cache_unit = xres * save_lines;
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plane->marker->cache_unit = xres * save_lines;
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/*
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* Set MERAM for framebuffer
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*
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* we also chain the cache_icb and the marker_icb.
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* we also split the allocated MERAM buffer between two ICBs.
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*/
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meram_write_icb(priv->base, plane->cache->index, MExxCTL,
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MERAM_MExxCTL_VAL(plane->marker->index, marker->offset)
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| MExxCTL_WD1 | MExxCTL_WD0 | MExxCTL_WS | MExxCTL_CM |
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MExxCTL_MD_FB);
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meram_write_icb(priv->base, plane->marker->index, MExxCTL,
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MERAM_MExxCTL_VAL(plane->cache->index, marker->offset +
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plane->marker->size / 2) |
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MExxCTL_WD1 | MExxCTL_WD0 | MExxCTL_WS | MExxCTL_CM |
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MExxCTL_MD_FB);
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return 0;
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}
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static void meram_plane_cleanup(struct sh_mobile_meram_priv *priv,
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struct sh_mobile_meram_fb_plane *plane)
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{
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/* disable ICB */
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meram_write_icb(priv->base, plane->cache->index, MExxCTL,
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MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF);
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meram_write_icb(priv->base, plane->marker->index, MExxCTL,
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MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF);
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plane->cache->cache_unit = 0;
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plane->marker->cache_unit = 0;
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}
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/* -----------------------------------------------------------------------------
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* MERAM operations
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*/
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unsigned long sh_mobile_meram_alloc(struct sh_mobile_meram_info *pdata,
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size_t size)
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{
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struct sh_mobile_meram_priv *priv = pdata->priv;
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return meram_alloc(priv, size);
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}
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EXPORT_SYMBOL_GPL(sh_mobile_meram_alloc);
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void sh_mobile_meram_free(struct sh_mobile_meram_info *pdata, unsigned long mem,
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size_t size)
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{
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struct sh_mobile_meram_priv *priv = pdata->priv;
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meram_free(priv, mem, size);
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}
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EXPORT_SYMBOL_GPL(sh_mobile_meram_free);
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/* Allocate memory for the ICBs and mark them as used. */
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static struct sh_mobile_meram_fb_cache *
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meram_cache_alloc(struct sh_mobile_meram_priv *priv,
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const struct sh_mobile_meram_cfg *cfg,
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int pixelformat)
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{
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unsigned int nplanes = is_nvcolor(pixelformat) ? 2 : 1;
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struct sh_mobile_meram_fb_cache *cache;
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int ret;
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cache = kzalloc(sizeof(*cache), GFP_KERNEL);
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if (cache == NULL)
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return ERR_PTR(-ENOMEM);
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cache->nplanes = nplanes;
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ret = meram_plane_alloc(priv, &cache->planes[0],
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cfg->icb[0].meram_size);
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if (ret < 0)
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goto error;
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cache->planes[0].marker->current_reg = 1;
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cache->planes[0].marker->pixelformat = pixelformat;
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if (cache->nplanes == 1)
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return cache;
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ret = meram_plane_alloc(priv, &cache->planes[1],
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cfg->icb[1].meram_size);
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if (ret < 0) {
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meram_plane_free(priv, &cache->planes[0]);
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goto error;
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}
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|
|
return cache;
|
|
|
|
error:
|
|
kfree(cache);
|
|
return ERR_PTR(-ENOMEM);
|
|
}
|
|
|
|
void *sh_mobile_meram_cache_alloc(struct sh_mobile_meram_info *pdata,
|
|
const struct sh_mobile_meram_cfg *cfg,
|
|
unsigned int xres, unsigned int yres,
|
|
unsigned int pixelformat, unsigned int *pitch)
|
|
{
|
|
struct sh_mobile_meram_fb_cache *cache;
|
|
struct sh_mobile_meram_priv *priv = pdata->priv;
|
|
struct platform_device *pdev = pdata->pdev;
|
|
unsigned int nplanes = is_nvcolor(pixelformat) ? 2 : 1;
|
|
unsigned int out_pitch;
|
|
|
|
if (priv == NULL)
|
|
return ERR_PTR(-ENODEV);
|
|
|
|
if (pixelformat != SH_MOBILE_MERAM_PF_NV &&
|
|
pixelformat != SH_MOBILE_MERAM_PF_NV24 &&
|
|
pixelformat != SH_MOBILE_MERAM_PF_RGB)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
dev_dbg(&pdev->dev, "registering %dx%d (%s)", xres, yres,
|
|
!pixelformat ? "yuv" : "rgb");
|
|
|
|
/* we can't handle wider than 8192px */
|
|
if (xres > 8192) {
|
|
dev_err(&pdev->dev, "width exceeding the limit (> 8192).");
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
|
|
if (cfg->icb[0].meram_size == 0)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
if (nplanes == 2 && cfg->icb[1].meram_size == 0)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
mutex_lock(&priv->lock);
|
|
|
|
/* We now register the ICBs and allocate the MERAM regions. */
|
|
cache = meram_cache_alloc(priv, cfg, pixelformat);
|
|
if (IS_ERR(cache)) {
|
|
dev_err(&pdev->dev, "MERAM allocation failed (%ld).",
|
|
PTR_ERR(cache));
|
|
goto err;
|
|
}
|
|
|
|
/* initialize MERAM */
|
|
meram_plane_init(priv, &cache->planes[0], xres, yres, &out_pitch);
|
|
*pitch = out_pitch;
|
|
if (pixelformat == SH_MOBILE_MERAM_PF_NV)
|
|
meram_plane_init(priv, &cache->planes[1],
|
|
xres, (yres + 1) / 2, &out_pitch);
|
|
else if (pixelformat == SH_MOBILE_MERAM_PF_NV24)
|
|
meram_plane_init(priv, &cache->planes[1],
|
|
2 * xres, (yres + 1) / 2, &out_pitch);
|
|
|
|
err:
|
|
mutex_unlock(&priv->lock);
|
|
return cache;
|
|
}
|
|
EXPORT_SYMBOL_GPL(sh_mobile_meram_cache_alloc);
|
|
|
|
void
|
|
sh_mobile_meram_cache_free(struct sh_mobile_meram_info *pdata, void *data)
|
|
{
|
|
struct sh_mobile_meram_fb_cache *cache = data;
|
|
struct sh_mobile_meram_priv *priv = pdata->priv;
|
|
|
|
mutex_lock(&priv->lock);
|
|
|
|
/* Cleanup and free. */
|
|
meram_plane_cleanup(priv, &cache->planes[0]);
|
|
meram_plane_free(priv, &cache->planes[0]);
|
|
|
|
if (cache->nplanes == 2) {
|
|
meram_plane_cleanup(priv, &cache->planes[1]);
|
|
meram_plane_free(priv, &cache->planes[1]);
|
|
}
|
|
|
|
kfree(cache);
|
|
|
|
mutex_unlock(&priv->lock);
|
|
}
|
|
EXPORT_SYMBOL_GPL(sh_mobile_meram_cache_free);
|
|
|
|
void
|
|
sh_mobile_meram_cache_update(struct sh_mobile_meram_info *pdata, void *data,
|
|
unsigned long base_addr_y,
|
|
unsigned long base_addr_c,
|
|
unsigned long *icb_addr_y,
|
|
unsigned long *icb_addr_c)
|
|
{
|
|
struct sh_mobile_meram_fb_cache *cache = data;
|
|
struct sh_mobile_meram_priv *priv = pdata->priv;
|
|
|
|
mutex_lock(&priv->lock);
|
|
|
|
meram_set_next_addr(priv, cache, base_addr_y, base_addr_c);
|
|
meram_get_next_icb_addr(pdata, cache, icb_addr_y, icb_addr_c);
|
|
|
|
mutex_unlock(&priv->lock);
|
|
}
|
|
EXPORT_SYMBOL_GPL(sh_mobile_meram_cache_update);
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Power management
|
|
*/
|
|
|
|
#if defined(CONFIG_PM_SLEEP) || defined(CONFIG_PM_RUNTIME)
|
|
static int sh_mobile_meram_suspend(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
|
|
unsigned int i, j;
|
|
|
|
for (i = 0; i < MERAM_REGS_SIZE; i++)
|
|
priv->regs[i] = meram_read_reg(priv->base, common_regs[i]);
|
|
|
|
for (i = 0; i < 32; i++) {
|
|
if (!test_bit(i, &priv->used_icb))
|
|
continue;
|
|
for (j = 0; j < ICB_REGS_SIZE; j++) {
|
|
priv->icbs[i].regs[j] =
|
|
meram_read_icb(priv->base, i, icb_regs[j]);
|
|
/* Reset ICB on resume */
|
|
if (icb_regs[j] == MExxCTL)
|
|
priv->icbs[i].regs[j] |=
|
|
MExxCTL_WBF | MExxCTL_WF | MExxCTL_RF;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int sh_mobile_meram_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
|
|
unsigned int i, j;
|
|
|
|
for (i = 0; i < 32; i++) {
|
|
if (!test_bit(i, &priv->used_icb))
|
|
continue;
|
|
for (j = 0; j < ICB_REGS_SIZE; j++)
|
|
meram_write_icb(priv->base, i, icb_regs[j],
|
|
priv->icbs[i].regs[j]);
|
|
}
|
|
|
|
for (i = 0; i < MERAM_REGS_SIZE; i++)
|
|
meram_write_reg(priv->base, common_regs[i], priv->regs[i]);
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_PM_SLEEP || CONFIG_PM_RUNTIME */
|
|
|
|
static UNIVERSAL_DEV_PM_OPS(sh_mobile_meram_dev_pm_ops,
|
|
sh_mobile_meram_suspend,
|
|
sh_mobile_meram_resume, NULL);
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* Probe/remove and driver init/exit
|
|
*/
|
|
|
|
static int sh_mobile_meram_probe(struct platform_device *pdev)
|
|
{
|
|
struct sh_mobile_meram_priv *priv;
|
|
struct sh_mobile_meram_info *pdata = pdev->dev.platform_data;
|
|
struct resource *regs;
|
|
struct resource *meram;
|
|
unsigned int i;
|
|
int error;
|
|
|
|
if (!pdata) {
|
|
dev_err(&pdev->dev, "no platform data defined\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
meram = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
|
if (regs == NULL || meram == NULL) {
|
|
dev_err(&pdev->dev, "cannot get platform resources\n");
|
|
return -ENOENT;
|
|
}
|
|
|
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
|
if (!priv) {
|
|
dev_err(&pdev->dev, "cannot allocate device data\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* Initialize private data. */
|
|
mutex_init(&priv->lock);
|
|
priv->used_icb = pdata->reserved_icbs;
|
|
|
|
for (i = 0; i < MERAM_ICB_NUM; ++i)
|
|
priv->icbs[i].index = i;
|
|
|
|
pdata->priv = priv;
|
|
pdata->pdev = pdev;
|
|
|
|
/* Request memory regions and remap the registers. */
|
|
if (!request_mem_region(regs->start, resource_size(regs), pdev->name)) {
|
|
dev_err(&pdev->dev, "MERAM registers region already claimed\n");
|
|
error = -EBUSY;
|
|
goto err_req_regs;
|
|
}
|
|
|
|
if (!request_mem_region(meram->start, resource_size(meram),
|
|
pdev->name)) {
|
|
dev_err(&pdev->dev, "MERAM memory region already claimed\n");
|
|
error = -EBUSY;
|
|
goto err_req_meram;
|
|
}
|
|
|
|
priv->base = ioremap_nocache(regs->start, resource_size(regs));
|
|
if (!priv->base) {
|
|
dev_err(&pdev->dev, "ioremap failed\n");
|
|
error = -EFAULT;
|
|
goto err_ioremap;
|
|
}
|
|
|
|
priv->meram = meram->start;
|
|
|
|
/* Create and initialize the MERAM memory pool. */
|
|
priv->pool = gen_pool_create(ilog2(MERAM_GRANULARITY), -1);
|
|
if (priv->pool == NULL) {
|
|
error = -ENOMEM;
|
|
goto err_genpool;
|
|
}
|
|
|
|
error = gen_pool_add(priv->pool, meram->start, resource_size(meram),
|
|
-1);
|
|
if (error < 0)
|
|
goto err_genpool;
|
|
|
|
/* initialize ICB addressing mode */
|
|
if (pdata->addr_mode == SH_MOBILE_MERAM_MODE1)
|
|
meram_write_reg(priv->base, MEVCR1, MEVCR1_AMD1);
|
|
|
|
platform_set_drvdata(pdev, priv);
|
|
pm_runtime_enable(&pdev->dev);
|
|
|
|
dev_info(&pdev->dev, "sh_mobile_meram initialized.");
|
|
|
|
return 0;
|
|
|
|
err_genpool:
|
|
if (priv->pool)
|
|
gen_pool_destroy(priv->pool);
|
|
iounmap(priv->base);
|
|
err_ioremap:
|
|
release_mem_region(meram->start, resource_size(meram));
|
|
err_req_meram:
|
|
release_mem_region(regs->start, resource_size(regs));
|
|
err_req_regs:
|
|
mutex_destroy(&priv->lock);
|
|
kfree(priv);
|
|
|
|
return error;
|
|
}
|
|
|
|
|
|
static int sh_mobile_meram_remove(struct platform_device *pdev)
|
|
{
|
|
struct sh_mobile_meram_priv *priv = platform_get_drvdata(pdev);
|
|
struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
struct resource *meram = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
|
|
gen_pool_destroy(priv->pool);
|
|
|
|
iounmap(priv->base);
|
|
release_mem_region(meram->start, resource_size(meram));
|
|
release_mem_region(regs->start, resource_size(regs));
|
|
|
|
mutex_destroy(&priv->lock);
|
|
|
|
kfree(priv);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sh_mobile_meram_driver = {
|
|
.driver = {
|
|
.name = "sh_mobile_meram",
|
|
.owner = THIS_MODULE,
|
|
.pm = &sh_mobile_meram_dev_pm_ops,
|
|
},
|
|
.probe = sh_mobile_meram_probe,
|
|
.remove = sh_mobile_meram_remove,
|
|
};
|
|
|
|
module_platform_driver(sh_mobile_meram_driver);
|
|
|
|
MODULE_DESCRIPTION("SuperH Mobile MERAM driver");
|
|
MODULE_AUTHOR("Damian Hobson-Garcia / Takanari Hayama");
|
|
MODULE_LICENSE("GPL v2");
|