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HiSilicon PCIe tune and trace device(PTT) is a PCIe Root Complex integrated Endpoint(RCiEP) device, providing the capability to dynamically monitor and tune the PCIe traffic and trace the TLP headers. Add the driver for the device to enable the trace function. Register PMU device of PTT trace, then users can use trace through perf command. The driver makes use of perf AUX trace function and support the following events to configure the trace: - filter: select Root port or Endpoint to trace - type: select the type of traced TLP headers - direction: select the direction of traced TLP headers - format: select the data format of the traced TLP headers This patch initially add basic trace support of PTT device. Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/20220816114414.4092-3-yangyicong@huawei.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
12 lines
468 B
Text
12 lines
468 B
Text
# SPDX-License-Identifier: GPL-2.0-only
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config HISI_PTT
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tristate "HiSilicon PCIe Tune and Trace Device"
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depends on ARM64 || (COMPILE_TEST && 64BIT)
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depends on PCI && HAS_DMA && HAS_IOMEM && PERF_EVENTS
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help
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HiSilicon PCIe Tune and Trace device exists as a PCIe RCiEP
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device, and it provides support for PCIe traffic tuning and
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tracing TLP headers to the memory.
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This driver can also be built as a module. If so, the module
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will be called hisi_ptt.
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