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![Denys Vlasenko](/assets/img/avatar_default.png)
By the nature of the TEST operation, it is often possible to test a narrower part of the operand: "testl $3, mem" -> "testb $3, mem", "testq $3, %rcx" -> "testb $3, %cl" This results in shorter instructions, because the TEST instruction has no sign-entending byte-immediate forms unlike other ALU ops. Note that this change does not create any LCP (Length-Changing Prefix) stalls, which happen when adding a 0x66 prefix, which happens when 16-bit immediates are used, which changes such TEST instructions: [test_opcode] [modrm] [imm32] to: [0x66] [test_opcode] [modrm] [imm16] where [imm16] has a *different length* now: 2 bytes instead of 4. This confuses the decoder and slows down execution. REX prefixes were carefully designed to almost never hit this case: adding REX prefix does not change instruction length except MOVABS and MOV [addr],RAX instruction. This patch does not add instructions which would use a 0x66 prefix, code changes in assembly are: -48 f7 07 01 00 00 00 testq $0x1,(%rdi) +f6 07 01 testb $0x1,(%rdi) -48 f7 c1 01 00 00 00 test $0x1,%rcx +f6 c1 01 test $0x1,%cl -48 f7 c1 02 00 00 00 test $0x2,%rcx +f6 c1 02 test $0x2,%cl -41 f7 c2 01 00 00 00 test $0x1,%r10d +41 f6 c2 01 test $0x1,%r10b -48 f7 c1 04 00 00 00 test $0x4,%rcx +f6 c1 04 test $0x4,%cl -48 f7 c1 08 00 00 00 test $0x8,%rcx +f6 c1 08 test $0x8,%cl Linus further notes: "There are no stalls from using 8-bit instruction forms. Now, changing from 64-bit or 32-bit 'test' instructions to 8-bit ones *could* cause problems if it ends up having forwarding issues, so that instead of just forwarding the result, you end up having to wait for it to be stable in the L1 cache (or possibly the register file). The forwarding from the store buffer is simplest and most reliable if the read is done at the exact same address and the exact same size as the write that gets forwarded. But that's true only if: (a) the write was very recent and is still in the write queue. I'm not sure that's the case here anyway. (b) on at least most Intel microarchitectures, you have to test a different byte than the lowest one (so forwarding a 64-bit write to a 8-bit read ends up working fine, as long as the 8-bit read is of the low 8 bits of the written data). A very similar issue *might* show up for registers too, not just memory writes, if you use 'testb' with a high-byte register (where instead of forwarding the value from the original producer it needs to go through the register file and then shifted). But it's mainly a problem for store buffers. But afaik, the way Denys changed the test instructions, neither of the above issues should be true. The real problem for store buffer forwarding tends to be "write 8 bits, read 32 bits". That can be really surprisingly expensive, because the read ends up having to wait until the write has hit the cacheline, and we might talk tens of cycles of latency here. But "write 32 bits, read the low 8 bits" *should* be fast on pretty much all x86 chips, afaik." Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com> Acked-by: Andy Lutomirski <luto@amacapital.net> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Kees Cook <keescook@chromium.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Will Drewry <wad@chromium.org> Link: http://lkml.kernel.org/r/1425675332-31576-1-git-send-email-dvlasenk@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
277 lines
5.6 KiB
ArmAsm
277 lines
5.6 KiB
ArmAsm
/*
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* relocate_kernel.S - put the kernel image in place to boot
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* Copyright (C) 2002-2004 Eric Biederman <ebiederm@xmission.com>
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*
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* This source code is licensed under the GNU General Public License,
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* Version 2. See the file COPYING for more details.
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*/
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#include <linux/linkage.h>
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#include <asm/page_types.h>
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#include <asm/kexec.h>
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#include <asm/processor-flags.h>
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/*
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* Must be relocatable PIC code callable as a C function
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*/
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#define PTR(x) (x << 2)
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/*
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* control_page + KEXEC_CONTROL_CODE_MAX_SIZE
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* ~ control_page + PAGE_SIZE are used as data storage and stack for
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* jumping back
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*/
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#define DATA(offset) (KEXEC_CONTROL_CODE_MAX_SIZE+(offset))
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/* Minimal CPU state */
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#define ESP DATA(0x0)
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#define CR0 DATA(0x4)
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#define CR3 DATA(0x8)
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#define CR4 DATA(0xc)
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/* other data */
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#define CP_VA_CONTROL_PAGE DATA(0x10)
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#define CP_PA_PGD DATA(0x14)
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#define CP_PA_SWAP_PAGE DATA(0x18)
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#define CP_PA_BACKUP_PAGES_MAP DATA(0x1c)
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.text
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.globl relocate_kernel
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relocate_kernel:
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/* Save the CPU context, used for jumping back */
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pushl %ebx
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pushl %esi
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pushl %edi
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pushl %ebp
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pushf
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movl 20+8(%esp), %ebp /* list of pages */
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movl PTR(VA_CONTROL_PAGE)(%ebp), %edi
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movl %esp, ESP(%edi)
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movl %cr0, %eax
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movl %eax, CR0(%edi)
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movl %cr3, %eax
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movl %eax, CR3(%edi)
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movl %cr4, %eax
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movl %eax, CR4(%edi)
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/* read the arguments and say goodbye to the stack */
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movl 20+4(%esp), %ebx /* page_list */
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movl 20+8(%esp), %ebp /* list of pages */
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movl 20+12(%esp), %edx /* start address */
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movl 20+16(%esp), %ecx /* cpu_has_pae */
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movl 20+20(%esp), %esi /* preserve_context */
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/* zero out flags, and disable interrupts */
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pushl $0
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popfl
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/* save some information for jumping back */
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movl PTR(VA_CONTROL_PAGE)(%ebp), %edi
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movl %edi, CP_VA_CONTROL_PAGE(%edi)
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movl PTR(PA_PGD)(%ebp), %eax
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movl %eax, CP_PA_PGD(%edi)
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movl PTR(PA_SWAP_PAGE)(%ebp), %eax
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movl %eax, CP_PA_SWAP_PAGE(%edi)
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movl %ebx, CP_PA_BACKUP_PAGES_MAP(%edi)
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/*
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* get physical address of control page now
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* this is impossible after page table switch
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*/
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movl PTR(PA_CONTROL_PAGE)(%ebp), %edi
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/* switch to new set of page tables */
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movl PTR(PA_PGD)(%ebp), %eax
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movl %eax, %cr3
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/* setup a new stack at the end of the physical control page */
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lea PAGE_SIZE(%edi), %esp
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/* jump to identity mapped page */
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movl %edi, %eax
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addl $(identity_mapped - relocate_kernel), %eax
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pushl %eax
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ret
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identity_mapped:
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/* set return address to 0 if not preserving context */
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pushl $0
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/* store the start address on the stack */
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pushl %edx
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/*
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* Set cr0 to a known state:
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* - Paging disabled
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* - Alignment check disabled
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* - Write protect disabled
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* - No task switch
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* - Don't do FP software emulation.
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* - Proctected mode enabled
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*/
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movl %cr0, %eax
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andl $~(X86_CR0_PG | X86_CR0_AM | X86_CR0_WP | X86_CR0_TS | X86_CR0_EM), %eax
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orl $(X86_CR0_PE), %eax
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movl %eax, %cr0
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/* clear cr4 if applicable */
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testl %ecx, %ecx
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jz 1f
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/*
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* Set cr4 to a known state:
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* Setting everything to zero seems safe.
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*/
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xorl %eax, %eax
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movl %eax, %cr4
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jmp 1f
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1:
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/* Flush the TLB (needed?) */
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xorl %eax, %eax
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movl %eax, %cr3
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movl CP_PA_SWAP_PAGE(%edi), %eax
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pushl %eax
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pushl %ebx
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call swap_pages
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addl $8, %esp
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/*
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* To be certain of avoiding problems with self-modifying code
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* I need to execute a serializing instruction here.
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* So I flush the TLB, it's handy, and not processor dependent.
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*/
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xorl %eax, %eax
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movl %eax, %cr3
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/*
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* set all of the registers to known values
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* leave %esp alone
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*/
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testl %esi, %esi
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jnz 1f
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xorl %edi, %edi
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xorl %eax, %eax
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xorl %ebx, %ebx
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xorl %ecx, %ecx
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xorl %edx, %edx
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xorl %esi, %esi
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xorl %ebp, %ebp
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ret
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1:
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popl %edx
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movl CP_PA_SWAP_PAGE(%edi), %esp
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addl $PAGE_SIZE, %esp
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2:
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call *%edx
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/* get the re-entry point of the peer system */
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movl 0(%esp), %ebp
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call 1f
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1:
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popl %ebx
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subl $(1b - relocate_kernel), %ebx
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movl CP_VA_CONTROL_PAGE(%ebx), %edi
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lea PAGE_SIZE(%ebx), %esp
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movl CP_PA_SWAP_PAGE(%ebx), %eax
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movl CP_PA_BACKUP_PAGES_MAP(%ebx), %edx
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pushl %eax
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pushl %edx
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call swap_pages
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addl $8, %esp
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movl CP_PA_PGD(%ebx), %eax
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movl %eax, %cr3
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movl %cr0, %eax
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orl $X86_CR0_PG, %eax
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movl %eax, %cr0
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lea PAGE_SIZE(%edi), %esp
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movl %edi, %eax
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addl $(virtual_mapped - relocate_kernel), %eax
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pushl %eax
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ret
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virtual_mapped:
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movl CR4(%edi), %eax
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movl %eax, %cr4
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movl CR3(%edi), %eax
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movl %eax, %cr3
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movl CR0(%edi), %eax
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movl %eax, %cr0
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movl ESP(%edi), %esp
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movl %ebp, %eax
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popf
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popl %ebp
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popl %edi
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popl %esi
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popl %ebx
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ret
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/* Do the copies */
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swap_pages:
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movl 8(%esp), %edx
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movl 4(%esp), %ecx
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pushl %ebp
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pushl %ebx
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pushl %edi
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pushl %esi
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movl %ecx, %ebx
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jmp 1f
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0: /* top, read another word from the indirection page */
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movl (%ebx), %ecx
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addl $4, %ebx
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1:
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testb $0x1, %cl /* is it a destination page */
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jz 2f
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movl %ecx, %edi
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andl $0xfffff000, %edi
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jmp 0b
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2:
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testb $0x2, %cl /* is it an indirection page */
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jz 2f
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movl %ecx, %ebx
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andl $0xfffff000, %ebx
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jmp 0b
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2:
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testb $0x4, %cl /* is it the done indicator */
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jz 2f
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jmp 3f
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2:
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testb $0x8, %cl /* is it the source indicator */
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jz 0b /* Ignore it otherwise */
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movl %ecx, %esi /* For every source page do a copy */
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andl $0xfffff000, %esi
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movl %edi, %eax
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movl %esi, %ebp
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movl %edx, %edi
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movl $1024, %ecx
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rep ; movsl
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movl %ebp, %edi
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movl %eax, %esi
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movl $1024, %ecx
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rep ; movsl
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movl %eax, %edi
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movl %edx, %esi
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movl $1024, %ecx
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rep ; movsl
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lea PAGE_SIZE(%ebp), %esi
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jmp 0b
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3:
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popl %esi
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popl %edi
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popl %ebx
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popl %ebp
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ret
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.globl kexec_control_code_size
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.set kexec_control_code_size, . - relocate_kernel
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