mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-15 23:25:07 +00:00
a7d7a143d0
Pull DRM updates from Dave Airlie: "Like all good pull reqs this ends with a revert, so it must mean we tested it, [ Ed. That's _one_ way of looking at it ] This pull is missing nouveau, Ben has been stuck trying to track down a very longstanding bug that revealed itself due to some other changes. I've asked him to send you a direct pull request for nouveau once he cleans things up. I'm away until Monday so don't want to delay things, you can make a decision on that when he sends it, I have my phone so I can ack things just not really merge much. It has one trivial conflict with your tree in armada_drv.c, and also the pull request contains some component changes that are already in your tree, the base tree from Russell went via Greg's tree already, but some stuff still shows up in here that doesn't when I merge my tree into yours. Otherwise all pretty standard graphics fare, one new driver and changes all over the place. New drivers: - sti kms driver for STMicroelectronics chipsets stih416 and stih407. core: - lots of cleanups to the drm core - DP MST helper code merged - universal cursor planes. - render nodes enabled by default panel: - better panel interfaces - new panel support - non-continuous cock advertising ability ttm: - shrinker fixes i915: - hopefully ditched UMS support - runtime pm fixes - psr tracking and locking - now enabled by default - userptr fixes - backlight brightness fixes - MST support merged - runtime PM for dpms - primary planes locking fixes - gen8 hw semaphore support - fbc fixes - runtime PM on SOix sleep state hw. - mmio base page flipping - lots of vlv/chv fixes. - universal cursor planes radeon: - Hawaii fixes - display scalar support for non-fixed mode displays - new firmware format support - dpm on more asics by default - GPUVM improvements - uncached and wc GTT buffers - BOs > visible VRAM exynos: - i80 interface support - module auto-loading - ipp driver consolidated. armada: - irq handling in crtc layer only - crtc renumbering - add component support - DT interaction changes. tegra: - load as module fixes - eDP bpp and sync polarity fixed - DSI non-continuous clock mode support - better support for importing buffers from nouveau msm: - mdp5/adq8084 v1.3 hw enablement - devicetree clk changse - ifc6410 board working tda998x: - component support - DT documentation update vmwgfx: - fix compat shader namespace" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (551 commits) Revert "drm: drop redundant drm_file->is_master" drm/panel: simple: Use devm_gpiod_get_optional() drm/dsi: Replace upcasting macro by function drm/panel: ld9040: Replace upcasting macro by function drm/exynos: dp: Modify driver to support drm_panel drm/exynos: Move DP setup into commit() drm/panel: simple: Add AUO B133HTN01 panel support drm/panel: simple: Support delays in panel functions drm/panel: simple: Add proper definition for prepare and unprepare drm/panel: s6e8aa0: Add proper definition for prepare and unprepare drm/panel: ld9040: Add proper definition for prepare and unprepare drm/tegra: Add support for panel prepare and unprepare routines drm/exynos: dsi: Add support for panel prepare and unprepare routines drm/exynos: dpi: Add support for panel prepare and unprepare routines drm/panel: simple: Add dummy prepare and unprepare routines drm/panel: s6e8aa0: Add dummy prepare and unprepare routines drm/panel: ld9040: Add dummy prepare and unprepare routines drm/panel: Provide convenience wrapper for .get_modes() drm/panel: add .prepare() and .unprepare() functions drm/panel: simple: Remove simple-panel compatible ...
618 lines
15 KiB
Text
618 lines
15 KiB
Text
/*
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* Samsung's Exynos4 SoC series common device tree source
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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* Copyright (c) 2010-2011 Linaro Ltd.
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* www.linaro.org
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*
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* Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
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* SoCs from Exynos4 series can include this file and provide values for SoCs
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* specfic bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/clock/exynos4.h>
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#include <dt-bindings/clock/exynos-audss-clk.h>
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#include "skeleton.dtsi"
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/ {
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interrupt-parent = <&gic>;
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aliases {
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spi0 = &spi_0;
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spi1 = &spi_1;
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spi2 = &spi_2;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &i2c_4;
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i2c5 = &i2c_5;
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i2c6 = &i2c_6;
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i2c7 = &i2c_7;
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csis0 = &csis_0;
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csis1 = &csis_1;
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fimc0 = &fimc_0;
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fimc1 = &fimc_1;
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fimc2 = &fimc_2;
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fimc3 = &fimc_3;
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serial0 = &serial_0;
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serial1 = &serial_1;
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serial2 = &serial_2;
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serial3 = &serial_3;
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};
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clock_audss: clock-controller@03810000 {
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compatible = "samsung,exynos4210-audss-clock";
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reg = <0x03810000 0x0C>;
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#clock-cells = <1>;
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};
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i2s0: i2s@03830000 {
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compatible = "samsung,s5pv210-i2s";
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reg = <0x03830000 0x100>;
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clocks = <&clock_audss EXYNOS_I2S_BUS>;
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clock-names = "iis";
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dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
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dma-names = "tx", "rx", "tx-sec";
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samsung,idma-addr = <0x03000000>;
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status = "disabled";
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};
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chipid@10000000 {
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compatible = "samsung,exynos4210-chipid";
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reg = <0x10000000 0x100>;
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};
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mipi_phy: video-phy@10020710 {
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compatible = "samsung,s5pv210-mipi-video-phy";
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reg = <0x10020710 8>;
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#phy-cells = <1>;
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};
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pd_mfc: mfc-power-domain@10023C40 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C40 0x20>;
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};
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pd_g3d: g3d-power-domain@10023C60 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C60 0x20>;
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};
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pd_lcd0: lcd0-power-domain@10023C80 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C80 0x20>;
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};
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pd_tv: tv-power-domain@10023C20 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C20 0x20>;
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};
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pd_cam: cam-power-domain@10023C00 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023C00 0x20>;
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};
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pd_gps: gps-power-domain@10023CE0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CE0 0x20>;
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};
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pd_gps_alive: gps-alive-power-domain@10023D00 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023D00 0x20>;
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};
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gic: interrupt-controller@10490000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
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};
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combiner: interrupt-controller@10440000 {
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compatible = "samsung,exynos4210-combiner";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0x10440000 0x1000>;
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};
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sys_reg: syscon@10010000 {
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compatible = "samsung,exynos4-sysreg", "syscon";
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reg = <0x10010000 0x400>;
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};
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pmu_system_controller: system-controller@10020000 {
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compatible = "samsung,exynos4210-pmu", "syscon";
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reg = <0x10020000 0x4000>;
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};
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dsi_0: dsi@11C80000 {
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compatible = "samsung,exynos4210-mipi-dsi";
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reg = <0x11C80000 0x10000>;
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interrupts = <0 79 0>;
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samsung,power-domain = <&pd_lcd0>;
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phys = <&mipi_phy 1>;
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phy-names = "dsim";
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clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
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clock-names = "bus_clk", "pll_clk";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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camera {
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compatible = "samsung,fimc", "simple-bus";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <1>;
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#clock-cells = <1>;
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clock-output-names = "cam_a_clkout", "cam_b_clkout";
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ranges;
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fimc_0: fimc@11800000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11800000 0x1000>;
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interrupts = <0 84 0>;
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clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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fimc_1: fimc@11810000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11810000 0x1000>;
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interrupts = <0 85 0>;
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clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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fimc_2: fimc@11820000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11820000 0x1000>;
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interrupts = <0 86 0>;
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clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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fimc_3: fimc@11830000 {
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compatible = "samsung,exynos4210-fimc";
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reg = <0x11830000 0x1000>;
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interrupts = <0 87 0>;
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clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
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clock-names = "fimc", "sclk_fimc";
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samsung,power-domain = <&pd_cam>;
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samsung,sysreg = <&sys_reg>;
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status = "disabled";
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};
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csis_0: csis@11880000 {
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compatible = "samsung,exynos4210-csis";
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reg = <0x11880000 0x4000>;
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interrupts = <0 78 0>;
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clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
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clock-names = "csis", "sclk_csis";
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bus-width = <4>;
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samsung,power-domain = <&pd_cam>;
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phys = <&mipi_phy 0>;
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phy-names = "csis";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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csis_1: csis@11890000 {
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compatible = "samsung,exynos4210-csis";
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reg = <0x11890000 0x4000>;
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interrupts = <0 80 0>;
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clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
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clock-names = "csis", "sclk_csis";
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bus-width = <2>;
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samsung,power-domain = <&pd_cam>;
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phys = <&mipi_phy 2>;
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phy-names = "csis";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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watchdog@10060000 {
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compatible = "samsung,s3c2410-wdt";
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reg = <0x10060000 0x100>;
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interrupts = <0 43 0>;
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clocks = <&clock CLK_WDT>;
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clock-names = "watchdog";
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status = "disabled";
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};
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rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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interrupts = <0 44 0>, <0 45 0>;
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clocks = <&clock CLK_RTC>;
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clock-names = "rtc";
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status = "disabled";
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};
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keypad@100A0000 {
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compatible = "samsung,s5pv210-keypad";
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reg = <0x100A0000 0x100>;
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interrupts = <0 109 0>;
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clocks = <&clock CLK_KEYIF>;
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clock-names = "keypad";
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status = "disabled";
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};
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sdhci@12510000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12510000 0x100>;
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interrupts = <0 73 0>;
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clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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sdhci@12520000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12520000 0x100>;
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interrupts = <0 74 0>;
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clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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sdhci@12530000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12530000 0x100>;
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interrupts = <0 75 0>;
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clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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sdhci@12540000 {
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compatible = "samsung,exynos4210-sdhci";
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reg = <0x12540000 0x100>;
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interrupts = <0 76 0>;
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clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
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clock-names = "hsmmc", "mmc_busclk.2";
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status = "disabled";
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};
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exynos_usbphy: exynos-usbphy@125B0000 {
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compatible = "samsung,exynos4210-usb2-phy";
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reg = <0x125B0000 0x100>;
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samsung,pmureg-phandle = <&pmu_system_controller>;
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clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
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clock-names = "phy", "ref";
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#phy-cells = <1>;
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status = "disabled";
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};
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hsotg@12480000 {
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compatible = "samsung,s3c6400-hsotg";
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reg = <0x12480000 0x20000>;
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interrupts = <0 71 0>;
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clocks = <&clock CLK_USB_DEVICE>;
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clock-names = "otg";
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phys = <&exynos_usbphy 0>;
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phy-names = "usb2-phy";
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status = "disabled";
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};
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ehci@12580000 {
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compatible = "samsung,exynos4210-ehci";
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reg = <0x12580000 0x100>;
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interrupts = <0 70 0>;
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clocks = <&clock CLK_USB_HOST>;
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clock-names = "usbhost";
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status = "disabled";
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};
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ohci@12590000 {
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compatible = "samsung,exynos4210-ohci";
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reg = <0x12590000 0x100>;
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interrupts = <0 70 0>;
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clocks = <&clock CLK_USB_HOST>;
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clock-names = "usbhost";
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status = "disabled";
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};
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i2s1: i2s@13960000 {
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compatible = "samsung,s5pv210-i2s";
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reg = <0x13960000 0x100>;
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clocks = <&clock CLK_I2S1>;
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clock-names = "iis";
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dmas = <&pdma1 12>, <&pdma1 11>;
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dma-names = "tx", "rx";
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status = "disabled";
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};
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i2s2: i2s@13970000 {
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compatible = "samsung,s5pv210-i2s";
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reg = <0x13970000 0x100>;
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clocks = <&clock CLK_I2S2>;
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clock-names = "iis";
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dmas = <&pdma0 14>, <&pdma0 13>;
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dma-names = "tx", "rx";
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status = "disabled";
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};
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mfc: codec@13400000 {
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compatible = "samsung,mfc-v5";
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reg = <0x13400000 0x10000>;
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interrupts = <0 94 0>;
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samsung,power-domain = <&pd_mfc>;
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clocks = <&clock CLK_MFC>;
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clock-names = "mfc";
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status = "disabled";
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};
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serial_0: serial@13800000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13800000 0x100>;
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interrupts = <0 52 0>;
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clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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serial_1: serial@13810000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13810000 0x100>;
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interrupts = <0 53 0>;
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clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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serial_2: serial@13820000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x100>;
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interrupts = <0 54 0>;
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clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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serial_3: serial@13830000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13830000 0x100>;
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interrupts = <0 55 0>;
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clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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i2c_0: i2c@13860000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "samsung,s3c2440-i2c";
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reg = <0x13860000 0x100>;
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interrupts = <0 58 0>;
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_1: i2c@13870000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13870000 0x100>;
|
|
interrupts = <0 59 0>;
|
|
clocks = <&clock CLK_I2C1>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c1_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_2: i2c@13880000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13880000 0x100>;
|
|
interrupts = <0 60 0>;
|
|
clocks = <&clock CLK_I2C2>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c2_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_3: i2c@13890000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x13890000 0x100>;
|
|
interrupts = <0 61 0>;
|
|
clocks = <&clock CLK_I2C3>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c3_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_4: i2c@138A0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138A0000 0x100>;
|
|
interrupts = <0 62 0>;
|
|
clocks = <&clock CLK_I2C4>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c4_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_5: i2c@138B0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138B0000 0x100>;
|
|
interrupts = <0 63 0>;
|
|
clocks = <&clock CLK_I2C5>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c5_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_6: i2c@138C0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138C0000 0x100>;
|
|
interrupts = <0 64 0>;
|
|
clocks = <&clock CLK_I2C6>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c_7: i2c@138D0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "samsung,s3c2440-i2c";
|
|
reg = <0x138D0000 0x100>;
|
|
interrupts = <0 65 0>;
|
|
clocks = <&clock CLK_I2C7>;
|
|
clock-names = "i2c";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_0: spi@13920000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = <0x13920000 0x100>;
|
|
interrupts = <0 66 0>;
|
|
dmas = <&pdma0 7>, <&pdma0 6>;
|
|
dma-names = "tx", "rx";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_1: spi@13930000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = <0x13930000 0x100>;
|
|
interrupts = <0 67 0>;
|
|
dmas = <&pdma1 7>, <&pdma1 6>;
|
|
dma-names = "tx", "rx";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi_2: spi@13940000 {
|
|
compatible = "samsung,exynos4210-spi";
|
|
reg = <0x13940000 0x100>;
|
|
interrupts = <0 68 0>;
|
|
dmas = <&pdma0 9>, <&pdma0 8>;
|
|
dma-names = "tx", "rx";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
|
|
clock-names = "spi", "spi_busclk0";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi2_bus>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pwm@139D0000 {
|
|
compatible = "samsung,exynos4210-pwm";
|
|
reg = <0x139D0000 0x1000>;
|
|
interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
|
|
clocks = <&clock CLK_PWM>;
|
|
clock-names = "timers";
|
|
#pwm-cells = <3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
amba {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "arm,amba-bus";
|
|
interrupt-parent = <&gic>;
|
|
ranges;
|
|
|
|
pdma0: pdma@12680000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12680000 0x1000>;
|
|
interrupts = <0 35 0>;
|
|
clocks = <&clock CLK_PDMA0>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <1>;
|
|
#dma-channels = <8>;
|
|
#dma-requests = <32>;
|
|
};
|
|
|
|
pdma1: pdma@12690000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12690000 0x1000>;
|
|
interrupts = <0 36 0>;
|
|
clocks = <&clock CLK_PDMA1>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <1>;
|
|
#dma-channels = <8>;
|
|
#dma-requests = <32>;
|
|
};
|
|
|
|
mdma1: mdma@12850000 {
|
|
compatible = "arm,pl330", "arm,primecell";
|
|
reg = <0x12850000 0x1000>;
|
|
interrupts = <0 34 0>;
|
|
clocks = <&clock CLK_MDMA>;
|
|
clock-names = "apb_pclk";
|
|
#dma-cells = <1>;
|
|
#dma-channels = <8>;
|
|
#dma-requests = <1>;
|
|
};
|
|
};
|
|
|
|
fimd: fimd@11c00000 {
|
|
compatible = "samsung,exynos4210-fimd";
|
|
interrupt-parent = <&combiner>;
|
|
reg = <0x11c00000 0x20000>;
|
|
interrupt-names = "fifo", "vsync", "lcd_sys";
|
|
interrupts = <11 0>, <11 1>, <11 2>;
|
|
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
|
|
clock-names = "sclk_fimd", "fimd";
|
|
samsung,power-domain = <&pd_lcd0>;
|
|
samsung,sysreg = <&sys_reg>;
|
|
status = "disabled";
|
|
};
|
|
};
|