mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 16:29:59 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
- An improvement from Ard Biesheuvel, who noted that the identity map setup was taking a long time due to flush_cache_louis(). - Update a comment about dma_ops from Wolfram Sang. - Remove use of "-p" with ld, where this flag has been a no-op since 2004. - Remove the printing of the virtual memory layout, which is no longer useful since we hide pointers. - Correct SCU help text. - Remove legacy TWD registration method. - Add pgprot_device() implementation for mapping PCI sysfs resource files. - Initialise PFN limits earlier for kmemleak. - Fix argument count to match macro definition (affects clang builds) - Use unified assembler language almost everywhere for clang, and other clang improvements (from Stefan Agner, Nathan Chancellor). - Support security extension for noMMU and other noMMU cleanups (from Vladimir Murzin). - Remove unnecessary SMP bringup code (which was incorrectly copy'n' pasted from the ARM platform implementations) and remove it from the arch code to discourge further copys of it appearing. - Add Cortex A9 erratum preventing kexec working on some SoCs. - AMBA bus identification updates from Mike Leach. - More use of raw spinlocks to avoid -RT kernel issues (from Yang Shi and Sebastian Andrzej Siewior). - MCPM hyp/svc mode mismatch fixes from Marek Szyprowski. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIUAwUAXIvD9vTnkBvkraxkAQIiiw/41bA3yIv+4J/t7vw6PkMRzFwRG8YYc+ms Rw6wlJIeBkiq2m5XOTNswMMjSDbYu0n5utzFTsf65nFxW2i34XkaC1kDws+vNdtx WrEPSj6sjXSjuWEV5O3neET5Wc+z+tEJRkRs7E/e/2x1DE4kzYWNy1UT3ohamZmh HN1Z9C7ijX5toPQ4AtiX12pc8f6CcodBsRUfebYf0+A7cVTyCkIxvMlvhparQjMW 8e4kLRuNvbHuzbbtlPCNMwnLR85FwM463OByk8F0nZ0RShQduAbnHaSZjVwLZUn5 8MMY4Yir7+R3sKc348kqE8WEVgKbeZYrgDJmM1RezJWfEblyFHnanNr/DWeskmZR 4ZFIESNAwQuTSIeCRhllBsGWrEU3pP8bnSTVAEKdv403rWTsRiA+R5/aMKMkfubK 1zNx8B3JszI4FeHVTW0l+2yVBbwm8ZTqHMBuSUF61I292ZrUXfaC+MgZ7CuhD1n9 vKO2MxuKb3BULJmpX5uT8RzBcRA/7eTDZrLkCUmSHmxwIMdkC4cVKyT33s9rue0J kT/W/iKB9QB4KuHVRVdOJ2VX/KN5YjsRNc5D4kW1Ml9gfdQ3ohWA4yZzPR26KeRE dHGcCbKK6jHyLxSQdJl1wItGBBUrAKV3u5IDgTClbE9X2LmJIbXwnMdAPC9WVJNb BfUPlCLS9w== =U6og -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm Pull ARM updates from Russell King: - An improvement from Ard Biesheuvel, who noted that the identity map setup was taking a long time due to flush_cache_louis(). - Update a comment about dma_ops from Wolfram Sang. - Remove use of "-p" with ld, where this flag has been a no-op since 2004. - Remove the printing of the virtual memory layout, which is no longer useful since we hide pointers. - Correct SCU help text. - Remove legacy TWD registration method. - Add pgprot_device() implementation for mapping PCI sysfs resource files. - Initialise PFN limits earlier for kmemleak. - Fix argument count to match macro definition (affects clang builds) - Use unified assembler language almost everywhere for clang, and other clang improvements (from Stefan Agner, Nathan Chancellor). - Support security extension for noMMU and other noMMU cleanups (from Vladimir Murzin). - Remove unnecessary SMP bringup code (which was incorrectly copy'n' pasted from the ARM platform implementations) and remove it from the arch code to discourge further copys of it appearing. - Add Cortex A9 erratum preventing kexec working on some SoCs. - AMBA bus identification updates from Mike Leach. - More use of raw spinlocks to avoid -RT kernel issues (from Yang Shi and Sebastian Andrzej Siewior). - MCPM hyp/svc mode mismatch fixes from Marek Szyprowski. * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (32 commits) ARM: 8849/1: NOMMU: Fix encodings for PMSAv8's PRBAR4/PRLAR4 ARM: 8848/1: virt: Align GIC version check with arm64 counterpart ARM: 8847/1: pm: fix HYP/SVC mode mismatch when MCPM is used ARM: 8845/1: use unified assembler in c files ARM: 8844/1: use unified assembler in assembly files ARM: 8843/1: use unified assembler in headers ARM: 8841/1: use unified assembler in macros ARM: 8840/1: use a raw_spinlock_t in unwind ARM: 8839/1: kprobe: make patch_lock a raw_spinlock_t ARM: 8837/1: coresight: etmv4: Update ID register table to add UCI support ARM: 8836/1: drivers: amba: Update component matching to use the CoreSight UCI values. ARM: 8838/1: drivers: amba: Updates to component identification for driver matching. ARM: 8833/1: Ensure that NEON code always compiles with Clang ARM: avoid Cortex-A9 livelock on tight dmb loops ARM: smp: remove arch-provided "pen_release" ARM: actions: remove boot_lock and pen_release ARM: oxnas: remove CPU hotplug implementation ARM: qcom: remove unnecessary boot_lock ARM: 8832/1: NOMMU: Limit visibility for CONFIG_FLASH_{MEM_BASE,SIZE} ARM: 8831/1: NOMMU: pmsa-v8: remove unneeded semicolon ...
203 lines
5.4 KiB
C
203 lines
5.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
|
|
*/
|
|
|
|
#ifndef _CORESIGHT_PRIV_H
|
|
#define _CORESIGHT_PRIV_H
|
|
|
|
#include <linux/amba/bus.h>
|
|
#include <linux/bitops.h>
|
|
#include <linux/io.h>
|
|
#include <linux/coresight.h>
|
|
#include <linux/pm_runtime.h>
|
|
|
|
/*
|
|
* Coresight management registers (0xf00-0xfcc)
|
|
* 0xfa0 - 0xfa4: Management registers in PFTv1.0
|
|
* Trace registers in PFTv1.1
|
|
*/
|
|
#define CORESIGHT_ITCTRL 0xf00
|
|
#define CORESIGHT_CLAIMSET 0xfa0
|
|
#define CORESIGHT_CLAIMCLR 0xfa4
|
|
#define CORESIGHT_LAR 0xfb0
|
|
#define CORESIGHT_LSR 0xfb4
|
|
#define CORESIGHT_AUTHSTATUS 0xfb8
|
|
#define CORESIGHT_DEVID 0xfc8
|
|
#define CORESIGHT_DEVTYPE 0xfcc
|
|
|
|
|
|
/*
|
|
* Coresight device CLAIM protocol.
|
|
* See PSCI - ARM DEN 0022D, Section: 6.8.1 Debug and Trace save and restore.
|
|
*/
|
|
#define CORESIGHT_CLAIM_SELF_HOSTED BIT(1)
|
|
|
|
#define TIMEOUT_US 100
|
|
#define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb)
|
|
|
|
#define ETM_MODE_EXCL_KERN BIT(30)
|
|
#define ETM_MODE_EXCL_USER BIT(31)
|
|
|
|
typedef u32 (*coresight_read_fn)(const struct device *, u32 offset);
|
|
#define __coresight_simple_func(type, func, name, lo_off, hi_off) \
|
|
static ssize_t name##_show(struct device *_dev, \
|
|
struct device_attribute *attr, char *buf) \
|
|
{ \
|
|
type *drvdata = dev_get_drvdata(_dev->parent); \
|
|
coresight_read_fn fn = func; \
|
|
u64 val; \
|
|
pm_runtime_get_sync(_dev->parent); \
|
|
if (fn) \
|
|
val = (u64)fn(_dev->parent, lo_off); \
|
|
else \
|
|
val = coresight_read_reg_pair(drvdata->base, \
|
|
lo_off, hi_off); \
|
|
pm_runtime_put_sync(_dev->parent); \
|
|
return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val); \
|
|
} \
|
|
static DEVICE_ATTR_RO(name)
|
|
|
|
#define coresight_simple_func(type, func, name, offset) \
|
|
__coresight_simple_func(type, func, name, offset, -1)
|
|
#define coresight_simple_reg32(type, name, offset) \
|
|
__coresight_simple_func(type, NULL, name, offset, -1)
|
|
#define coresight_simple_reg64(type, name, lo_off, hi_off) \
|
|
__coresight_simple_func(type, NULL, name, lo_off, hi_off)
|
|
|
|
extern const u32 barrier_pkt[4];
|
|
#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(barrier_pkt))
|
|
|
|
enum etm_addr_type {
|
|
ETM_ADDR_TYPE_NONE,
|
|
ETM_ADDR_TYPE_SINGLE,
|
|
ETM_ADDR_TYPE_RANGE,
|
|
ETM_ADDR_TYPE_START,
|
|
ETM_ADDR_TYPE_STOP,
|
|
};
|
|
|
|
enum cs_mode {
|
|
CS_MODE_DISABLED,
|
|
CS_MODE_SYSFS,
|
|
CS_MODE_PERF,
|
|
};
|
|
|
|
/**
|
|
* struct cs_buffer - keep track of a recording session' specifics
|
|
* @cur: index of the current buffer
|
|
* @nr_pages: max number of pages granted to us
|
|
* @offset: offset within the current buffer
|
|
* @data_size: how much we collected in this run
|
|
* @snapshot: is this run in snapshot mode
|
|
* @data_pages: a handle the ring buffer
|
|
*/
|
|
struct cs_buffers {
|
|
unsigned int cur;
|
|
unsigned int nr_pages;
|
|
unsigned long offset;
|
|
local_t data_size;
|
|
bool snapshot;
|
|
void **data_pages;
|
|
};
|
|
|
|
static inline void coresight_insert_barrier_packet(void *buf)
|
|
{
|
|
if (buf)
|
|
memcpy(buf, barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE);
|
|
}
|
|
|
|
|
|
static inline void CS_LOCK(void __iomem *addr)
|
|
{
|
|
do {
|
|
/* Wait for things to settle */
|
|
mb();
|
|
writel_relaxed(0x0, addr + CORESIGHT_LAR);
|
|
} while (0);
|
|
}
|
|
|
|
static inline void CS_UNLOCK(void __iomem *addr)
|
|
{
|
|
do {
|
|
writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);
|
|
/* Make sure everyone has seen this */
|
|
mb();
|
|
} while (0);
|
|
}
|
|
|
|
static inline u64
|
|
coresight_read_reg_pair(void __iomem *addr, s32 lo_offset, s32 hi_offset)
|
|
{
|
|
u64 val;
|
|
|
|
val = readl_relaxed(addr + lo_offset);
|
|
val |= (hi_offset < 0) ? 0 :
|
|
(u64)readl_relaxed(addr + hi_offset) << 32;
|
|
return val;
|
|
}
|
|
|
|
static inline void coresight_write_reg_pair(void __iomem *addr, u64 val,
|
|
s32 lo_offset, s32 hi_offset)
|
|
{
|
|
writel_relaxed((u32)val, addr + lo_offset);
|
|
if (hi_offset >= 0)
|
|
writel_relaxed((u32)(val >> 32), addr + hi_offset);
|
|
}
|
|
|
|
void coresight_disable_path(struct list_head *path);
|
|
int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data);
|
|
struct coresight_device *coresight_get_sink(struct list_head *path);
|
|
struct coresight_device *coresight_get_enabled_sink(bool reset);
|
|
struct coresight_device *coresight_get_sink_by_id(u32 id);
|
|
struct list_head *coresight_build_path(struct coresight_device *csdev,
|
|
struct coresight_device *sink);
|
|
void coresight_release_path(struct list_head *path);
|
|
|
|
#ifdef CONFIG_CORESIGHT_SOURCE_ETM3X
|
|
extern int etm_readl_cp14(u32 off, unsigned int *val);
|
|
extern int etm_writel_cp14(u32 off, u32 val);
|
|
#else
|
|
static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
|
|
static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
|
|
#endif
|
|
|
|
/*
|
|
* Macros and inline functions to handle CoreSight UCI data and driver
|
|
* private data in AMBA ID table entries, and extract data values.
|
|
*/
|
|
|
|
/* coresight AMBA ID, no UCI, no driver data: id table entry */
|
|
#define CS_AMBA_ID(pid) \
|
|
{ \
|
|
.id = pid, \
|
|
.mask = 0x000fffff, \
|
|
}
|
|
|
|
/* coresight AMBA ID, UCI with driver data only: id table entry. */
|
|
#define CS_AMBA_ID_DATA(pid, dval) \
|
|
{ \
|
|
.id = pid, \
|
|
.mask = 0x000fffff, \
|
|
.data = (void *)&(struct amba_cs_uci_id) \
|
|
{ \
|
|
.data = (void *)dval, \
|
|
} \
|
|
}
|
|
|
|
/* coresight AMBA ID, full UCI structure: id table entry. */
|
|
#define CS_AMBA_UCI_ID(pid, uci_ptr) \
|
|
{ \
|
|
.id = pid, \
|
|
.mask = 0x000fffff, \
|
|
.data = uci_ptr \
|
|
}
|
|
|
|
/* extract the data value from a UCI structure given amba_id pointer. */
|
|
static inline void *coresight_get_uci_data(const struct amba_id *id)
|
|
{
|
|
if (id->data)
|
|
return ((struct amba_cs_uci_id *)(id->data))->data;
|
|
return 0;
|
|
}
|
|
|
|
#endif
|