Vladimir Oltean a8015ded89 net: mscc: ocelot: properly account for VLAN header length when setting MRU ... What the driver writes into MAC_MAXLEN_CFG does not actually represent VLAN_ETH_FRAME_LEN but instead ETH_FRAME_LEN + ETH_FCS_LEN. Yes they are numerically equal, but the difference is important, as the switch treats VLAN-tagged traffic specially and knows to increase the maximum accepted frame size automatically. So it is always wrong to account for VLAN in the MAC_MAXLEN_CFG register. Unconditionally increase the maximum allowed frame size for double-tagged traffic. Accounting for the additional length does not mean that the other VLAN membership checks aren't performed, so there's no harm done. Also, stop abusing the MTU name for configuring the MRU. There is no support for configuring the MRU on an interface at the moment. Fixes: a556c76adc ("net: mscc: Add initial Ocelot switch support") Fixes: fa914e9c4d ("net: mscc: ocelot: create a helper for changing the port MTU") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2020-03-09 18:58:17 -07:00
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arc	ARCv2: IDU-intc: Add support for edge-triggered interrupts	2019-08-26 22:34:59 +05:30
at91	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
bcm2835
brcmstb	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
fsl	soc: fsl: qe: avoid IS_ERR_VALUE in ucc_fast.c	2019-12-09 13:54:37 -06:00
imx	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
mediatek	iommu/mediatek: Clean up struct mtk_smi_iommu	2019-08-30 15:57:27 +02:00
mscc	net: mscc: ocelot: properly account for VLAN header length when setting MRU	2020-03-09 18:58:17 -07:00
nps
qcom	soc: qcom: ocmem: add missing includes	2019-10-07 08:19:43 -07:00
rockchip	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
sa1100	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
sifive	riscv: move sifive_l2_cache.h to include/soc	2020-01-12 10:12:44 -08:00
tegra	memory: tegra: Introduce Tegra30 EMC driver	2019-11-11 14:55:27 +01:00