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8d3f87d8cd
PTP hardware filter configuration performed by the driver for a given
user requested config is not correct for some of the PTP modes.
Following changes are needed for PTP config-filter implementation.
1. NIG_REG_TX_PTP_EN register - Bits 0/1/2 respectively enables
TimeSync/"V1 frame format support"/"V2 frame format support" on
the TX side. Set the associated bits based on the user request.
2. ptp4l application fails to operate in Peer Delay mode. Following
changes are needed to fix this,
a. Driver should enable (set to 0) DA #1-related bits for IPv4,
IPv6 and MAC destination addresses in these registers:
NIG_REG_TX_LLH_PTP_RULE_MASK
NIG_REG_LLH_PTP_RULE_MASK
b. NIG_REG_LLH_PTP_PARAM_MASK/NIG_REG_TX_LLH_PTP_PARAM_MASK should
be set to 0x0 in all modes.
Signed-off-by: Sudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com>
Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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| .. | ||
| common_hsi.h | ||
| eth_common.h | ||
| fcoe_common.h | ||
| iscsi_common.h | ||
| qed_chain.h | ||
| qed_eth_if.h | ||
| qed_fcoe_if.h | ||
| qed_if.h | ||
| qed_iov_if.h | ||
| qed_iscsi_if.h | ||
| qed_ll2_if.h | ||
| qed_roce_if.h | ||
| qede_roce.h | ||
| rdma_common.h | ||
| roce_common.h | ||
| storage_common.h | ||
| tcp_common.h | ||