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efc2d0f20a
Now, that we have linear map page tables configured, keep MMU enabled to allow faster relocation of segments to final destination. Cavium ThunderX2: Kernel Image size: 38M Iniramfs size: 46M Total relocation size: 84M MMU-disabled: relocation 7.489539915s MMU-enabled: relocation 0.03946095s Broadcom Stingray: The performance data: for a moderate size kernel + initramfs: 25M the relocation was taking 0.382s, with enabled MMU it now takes 0.019s only or x20 improvement. The time is proportional to the size of relocation, therefore if initramfs is larger, 100M it could take over a second. Signed-off-by: Pasha Tatashin <pasha.tatashin@soleen.com> Tested-by: Pingfan Liu <piliu@redhat.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20210930143113.1502553-13-pasha.tatashin@soleen.com Signed-off-by: Will Deacon <will@kernel.org>
92 lines
2.9 KiB
ArmAsm
92 lines
2.9 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* kexec for arm64
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*
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* Copyright (C) Linaro.
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* Copyright (C) Huawei Futurewei Technologies.
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* Copyright (C) 2021, Microsoft Corporation.
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* Pasha Tatashin <pasha.tatashin@soleen.com>
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*/
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#include <linux/kexec.h>
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/kexec.h>
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#include <asm/page.h>
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#include <asm/sysreg.h>
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#include <asm/virt.h>
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.macro turn_off_mmu tmp1, tmp2
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mov_q \tmp1, INIT_SCTLR_EL1_MMU_OFF
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pre_disable_mmu_workaround
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msr sctlr_el1, \tmp1
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isb
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.endm
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.section ".kexec_relocate.text", "ax"
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/*
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* arm64_relocate_new_kernel - Put a 2nd stage image in place and boot it.
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*
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* The memory that the old kernel occupies may be overwritten when copying the
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* new image to its final location. To assure that the
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* arm64_relocate_new_kernel routine which does that copy is not overwritten,
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* all code and data needed by arm64_relocate_new_kernel must be between the
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* symbols arm64_relocate_new_kernel and arm64_relocate_new_kernel_end. The
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* machine_kexec() routine will copy arm64_relocate_new_kernel to the kexec
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* safe memory that has been set up to be preserved during the copy operation.
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*/
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SYM_CODE_START(arm64_relocate_new_kernel)
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/* Setup the list loop variables. */
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ldr x18, [x0, #KIMAGE_ARCH_ZERO_PAGE] /* x18 = zero page for BBM */
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ldr x17, [x0, #KIMAGE_ARCH_TTBR1] /* x17 = linear map copy */
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ldr x16, [x0, #KIMAGE_HEAD] /* x16 = kimage_head */
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ldr x22, [x0, #KIMAGE_ARCH_PHYS_OFFSET] /* x22 phys_offset */
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raw_dcache_line_size x15, x1 /* x15 = dcache line size */
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break_before_make_ttbr_switch x18, x17, x1, x2 /* set linear map */
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.Lloop:
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and x12, x16, PAGE_MASK /* x12 = addr */
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sub x12, x12, x22 /* Convert x12 to virt */
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/* Test the entry flags. */
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.Ltest_source:
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tbz x16, IND_SOURCE_BIT, .Ltest_indirection
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/* Invalidate dest page to PoC. */
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mov x19, x13
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copy_page x13, x12, x1, x2, x3, x4, x5, x6, x7, x8
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add x1, x19, #PAGE_SIZE
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dcache_by_myline_op civac, sy, x19, x1, x15, x20
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b .Lnext
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.Ltest_indirection:
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tbz x16, IND_INDIRECTION_BIT, .Ltest_destination
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mov x14, x12 /* ptr = addr */
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b .Lnext
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.Ltest_destination:
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tbz x16, IND_DESTINATION_BIT, .Lnext
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mov x13, x12 /* dest = addr */
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.Lnext:
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ldr x16, [x14], #8 /* entry = *ptr++ */
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tbz x16, IND_DONE_BIT, .Lloop /* while (!(entry & DONE)) */
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/* wait for writes from copy_page to finish */
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dsb nsh
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ic iallu
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dsb nsh
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isb
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ldr x4, [x0, #KIMAGE_START] /* relocation start */
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ldr x1, [x0, #KIMAGE_ARCH_EL2_VECTORS] /* relocation start */
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ldr x0, [x0, #KIMAGE_ARCH_DTB_MEM] /* dtb address */
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turn_off_mmu x12, x13
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/* Start new image. */
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cbz x1, .Lel1
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mov x1, x4 /* relocation start */
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mov x2, x0 /* dtb address */
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mov x3, xzr
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mov x4, xzr
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mov x0, #HVC_SOFT_RESTART
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hvc #0 /* Jumps from el2 */
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.Lel1:
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mov x2, xzr
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mov x3, xzr
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br x4 /* Jumps from el1 */
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SYM_CODE_END(arm64_relocate_new_kernel)
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