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bc294838cc
Almost all PA-RISC machines have either a button that is labeled with 'TOC' or a BMC function to trigger a TOC. TOC is a non-maskable interrupt that is sent to the processor. This can be used for diagnostic purposes like obtaining a stack trace/register dump or to enter KDB/KGDB. As an example, on my c8000, TOC can be used with: CONFIG_KGDB=y CONFIG_KGDB_KDB=y and the 'kgdboc=ttyS0,115200' appended to the command line. Press ^[( on serial console, which will enter the BMC command line, and enter 'TOC s': root@(none):/# ( cli>TOC s Sending TOC/INIT. <Cpu3> 2800035d03e00000 0000000040c21ac8 CC_ERR_CHECK_TOC <Cpu0> 2800035d00e00000 0000000040c21ad0 CC_ERR_CHECK_TOC <Cpu2> 2800035d02e00000 0000000040c21ac8 CC_ERR_CHECK_TOC <Cpu1> 2800035d01e00000 0000000040c21ad0 CC_ERR_CHECK_TOC <Cpu3> 37000f7303e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY <Cpu0> 37000f7300e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY <Cpu2> 37000f7302e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY <Cpu1> 37000f7301e00000 2000000000000000 CC_ERR_CPU_CHECK_SUMMARY <Cpu3> 4300100803e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC <Cpu0> 4300100800e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC <Cpu2> 4300100802e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC <Cpu1> 4300100801e00000 c0000000001d26cc CC_MC_BR_TO_OS_TOC Entering kdb (current=0x00000000411cef80, pid 0) on processor 0 due to NonMaskable Interrupt @ 0x40c21ad0 [0]kdb> Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Helge Deller <deller@gmx.de>
88 lines
1.6 KiB
ArmAsm
88 lines
1.6 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* TOC (Transfer of Control) handler. */
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.level 1.1
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#include <asm/assembly.h>
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#include <asm/psw.h>
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#include <linux/threads.h>
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#include <linux/linkage.h>
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.text
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.import toc_intr,code
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.import toc_lock,data
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.align 16
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ENTRY_CFI(toc_handler)
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/*
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* synchronize CPUs and obtain offset
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* for stack setup.
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*/
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load32 PA(toc_lock),%r1
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0: ldcw,co 0(%r1),%r2
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cmpib,= 0,%r2,0b
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nop
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addi 1,%r2,%r4
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stw %r4,0(%r1)
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addi -1,%r2,%r4
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load32 PA(toc_stack),%sp
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/*
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* deposit CPU number into stack address,
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* so every CPU will have its own stack.
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*/
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SHLREG %r4,14,%r4
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add %r4,%sp,%sp
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/*
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* setup pt_regs on stack and save the
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* floating point registers. PIM_TOC doesn't
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* save fp registers, so we're doing it here.
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*/
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copy %sp,%arg0
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ldo PT_SZ_ALGN(%sp), %sp
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/* clear pt_regs */
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copy %arg0,%r1
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0: cmpb,<<,n %r1,%sp,0b
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stw,ma %r0,4(%r1)
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ldo PT_FR0(%arg0),%r25
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save_fp %r25
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/* go virtual */
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load32 PA(swapper_pg_dir),%r4
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mtctl %r4,%cr24
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mtctl %r4,%cr25
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/* Clear sr4-sr7 */
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mtsp %r0, %sr4
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mtsp %r0, %sr5
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mtsp %r0, %sr6
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mtsp %r0, %sr7
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tovirt_r1 %sp
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tovirt_r1 %arg0
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virt_map
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loadgp
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#ifdef CONFIG_64BIT
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ldo -16(%sp),%r29
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#endif
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load32 toc_intr,%r1
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be 0(%sr7,%r1)
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nop
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ENDPROC_CFI(toc_handler)
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/*
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* keep this checksum here, as it is part of the toc_handler
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* spanned by toc_handler_size (all words in toc_handler are
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* added in PDC and the sum must equal to zero.
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*/
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SYM_DATA(toc_handler_csum, .long 0)
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SYM_DATA(toc_handler_size, .long . - toc_handler)
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__PAGE_ALIGNED_BSS
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.align 64
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SYM_DATA(toc_stack, .block 16384*NR_CPUS)
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