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Platform reboots are expensive. Towards reducing downtime to apply firmware updates the Intel NVDIMM command definition is growing support for applying live firmware updates that only require temporarily suspending memory traffic instead of a full reboot. Follow-on commits add support for triggering firmware activation, this patch only defines the commands, adds probe support, and validates that they are blocked via the ioctl path. The ioctl-path block ensures that the OS is in charge since these commands have side effects only the OS can handle. Specifically firmware activation may cause the memory controller to be quiesced on the order of 100s of milliseconds. In that case Linux ensure the activation only takes place while the OS is in a suspend state. Link: https://pmem.io/documents/IntelOptanePMem_DSM_Interface-V2.0.pdf Cc: Vishal Verma <vishal.l.verma@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Cc: Ira Weiny <ira.weiny@intel.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
257 lines
6.6 KiB
C
257 lines
6.6 KiB
C
/*
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* Copyright (c) 2014-2016, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU Lesser General Public License,
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* version 2.1, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT ANY
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* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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* FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for
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* more details.
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*/
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#ifndef __NDCTL_H__
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#define __NDCTL_H__
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#include <linux/types.h>
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struct nd_cmd_dimm_flags {
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__u32 status;
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__u32 flags;
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} __packed;
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struct nd_cmd_get_config_size {
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__u32 status;
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__u32 config_size;
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__u32 max_xfer;
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} __packed;
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struct nd_cmd_get_config_data_hdr {
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__u32 in_offset;
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__u32 in_length;
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__u32 status;
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__u8 out_buf[0];
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} __packed;
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struct nd_cmd_set_config_hdr {
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__u32 in_offset;
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__u32 in_length;
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__u8 in_buf[0];
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} __packed;
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struct nd_cmd_vendor_hdr {
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__u32 opcode;
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__u32 in_length;
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__u8 in_buf[0];
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} __packed;
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struct nd_cmd_vendor_tail {
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__u32 status;
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__u32 out_length;
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__u8 out_buf[0];
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} __packed;
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struct nd_cmd_ars_cap {
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__u64 address;
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__u64 length;
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__u32 status;
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__u32 max_ars_out;
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__u32 clear_err_unit;
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__u16 flags;
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__u16 reserved;
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} __packed;
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struct nd_cmd_ars_start {
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__u64 address;
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__u64 length;
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__u16 type;
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__u8 flags;
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__u8 reserved[5];
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__u32 status;
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__u32 scrub_time;
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} __packed;
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struct nd_cmd_ars_status {
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__u32 status;
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__u32 out_length;
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__u64 address;
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__u64 length;
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__u64 restart_address;
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__u64 restart_length;
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__u16 type;
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__u16 flags;
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__u32 num_records;
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struct nd_ars_record {
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__u32 handle;
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__u32 reserved;
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__u64 err_address;
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__u64 length;
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} __packed records[0];
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} __packed;
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struct nd_cmd_clear_error {
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__u64 address;
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__u64 length;
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__u32 status;
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__u8 reserved[4];
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__u64 cleared;
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} __packed;
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enum {
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ND_CMD_IMPLEMENTED = 0,
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/* bus commands */
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ND_CMD_ARS_CAP = 1,
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ND_CMD_ARS_START = 2,
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ND_CMD_ARS_STATUS = 3,
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ND_CMD_CLEAR_ERROR = 4,
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/* per-dimm commands */
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ND_CMD_SMART = 1,
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ND_CMD_SMART_THRESHOLD = 2,
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ND_CMD_DIMM_FLAGS = 3,
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ND_CMD_GET_CONFIG_SIZE = 4,
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ND_CMD_GET_CONFIG_DATA = 5,
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ND_CMD_SET_CONFIG_DATA = 6,
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ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
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ND_CMD_VENDOR_EFFECT_LOG = 8,
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ND_CMD_VENDOR = 9,
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ND_CMD_CALL = 10,
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};
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enum {
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ND_ARS_VOLATILE = 1,
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ND_ARS_PERSISTENT = 2,
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ND_ARS_RETURN_PREV_DATA = 1 << 1,
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ND_CONFIG_LOCKED = 1,
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};
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static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
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{
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switch (cmd) {
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case ND_CMD_ARS_CAP: return "ars_cap";
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case ND_CMD_ARS_START: return "ars_start";
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case ND_CMD_ARS_STATUS: return "ars_status";
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case ND_CMD_CLEAR_ERROR: return "clear_error";
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case ND_CMD_CALL: return "cmd_call";
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default: return "unknown";
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}
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}
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static inline const char *nvdimm_cmd_name(unsigned cmd)
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{
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switch (cmd) {
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case ND_CMD_SMART: return "smart";
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case ND_CMD_SMART_THRESHOLD: return "smart_thresh";
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case ND_CMD_DIMM_FLAGS: return "flags";
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case ND_CMD_GET_CONFIG_SIZE: return "get_size";
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case ND_CMD_GET_CONFIG_DATA: return "get_data";
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case ND_CMD_SET_CONFIG_DATA: return "set_data";
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case ND_CMD_VENDOR_EFFECT_LOG_SIZE: return "effect_size";
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case ND_CMD_VENDOR_EFFECT_LOG: return "effect_log";
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case ND_CMD_VENDOR: return "vendor";
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case ND_CMD_CALL: return "cmd_call";
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default: return "unknown";
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}
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}
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#define ND_IOCTL 'N'
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#define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
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struct nd_cmd_dimm_flags)
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#define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
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struct nd_cmd_get_config_size)
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#define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
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struct nd_cmd_get_config_data_hdr)
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#define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
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struct nd_cmd_set_config_hdr)
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#define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\
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struct nd_cmd_vendor_hdr)
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#define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
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struct nd_cmd_ars_cap)
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#define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\
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struct nd_cmd_ars_start)
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#define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
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struct nd_cmd_ars_status)
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#define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR,\
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struct nd_cmd_clear_error)
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#define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */
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#define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */
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#define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */
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#define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */
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#define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */
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#define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */
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#define ND_DEVICE_DAX_PMEM 7 /* Device DAX interface to pmem */
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enum nd_driver_flags {
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ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM,
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ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM,
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ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK,
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ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO,
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ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM,
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ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK,
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ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM,
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};
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enum ars_masks {
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ARS_STATUS_MASK = 0x0000FFFF,
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ARS_EXT_STATUS_SHIFT = 16,
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};
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/*
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* struct nd_cmd_pkg
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*
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* is a wrapper to a quasi pass thru interface for invoking firmware
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* associated with nvdimms.
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*
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* INPUT PARAMETERS
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*
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* nd_family corresponds to the firmware (e.g. DSM) interface.
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*
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* nd_command are the function index advertised by the firmware.
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*
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* nd_size_in is the size of the input parameters being passed to firmware
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*
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* OUTPUT PARAMETERS
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*
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* nd_fw_size is the size of the data firmware wants to return for
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* the call. If nd_fw_size is greater than size of nd_size_out, only
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* the first nd_size_out bytes are returned.
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*/
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struct nd_cmd_pkg {
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__u64 nd_family; /* family of commands */
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__u64 nd_command;
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__u32 nd_size_in; /* INPUT: size of input args */
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__u32 nd_size_out; /* INPUT: size of payload */
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__u32 nd_reserved2[9]; /* reserved must be zero */
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__u32 nd_fw_size; /* OUTPUT: size fw wants to return */
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unsigned char nd_payload[]; /* Contents of call */
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};
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/* These NVDIMM families represent pre-standardization command sets */
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#define NVDIMM_FAMILY_INTEL 0
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#define NVDIMM_FAMILY_HPE1 1
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#define NVDIMM_FAMILY_HPE2 2
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#define NVDIMM_FAMILY_MSFT 3
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#define NVDIMM_FAMILY_HYPERV 4
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#define NVDIMM_FAMILY_PAPR 5
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#define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_PAPR
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#define NVDIMM_BUS_FAMILY_NFIT 0
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#define NVDIMM_BUS_FAMILY_INTEL 1
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#define NVDIMM_BUS_FAMILY_MAX NVDIMM_BUS_FAMILY_INTEL
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#define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL,\
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struct nd_cmd_pkg)
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#endif /* __NDCTL_H__ */
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