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a96e5ab8a7
As of 0.9.9b, the ddbridge code has been split from one single file (ddbridge-core.c) into multiple files, with the purpose of taking care of different topics, and to be able to reuse code in different kernel modules (ddbridge.ko and octonet.ko). This applies the same code split, with a notable difference: In the vendor package, the split was done by moving all code parts into separate files, and in the "main" code files (ddbridge.c and octonet.c), a simple "#include ddbridge-core.c" was done. In this patch, the same split (codewise) is done, but all resulting .c/.o files will be handled by the makefile, with proper prototyping of all shared functions done in ddbridge.h. To avoid conflicts wrt the global space, the I2C functions and necessary prototypes for ddbridge-i2c.c are moved into ddbridge-i2c.h, which is to be included wherever required. Signed-off-by: Daniel Scheller <d.scheller@gmx.net> Tested-by: Richard Scobie <r.scobie@clear.net.nz> Tested-by: Jasmin Jessich <jasmin@anw.at> Tested-by: Dietmar Spingler <d_spingler@freenet.de> Tested-by: Manfred Knick <Manfred.Knick@t-online.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
243 lines
6.6 KiB
C
243 lines
6.6 KiB
C
/*
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* ddbridge.h: Digital Devices PCIe bridge driver
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*
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* Copyright (C) 2010-2011 Digital Devices GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 only, as published by the Free Software Foundation.
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*
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* To obtain the license, point your browser to
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#ifndef _DDBRIDGE_H_
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#define _DDBRIDGE_H_
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <asm/dma.h>
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#include <linux/dvb/frontend.h>
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#include <linux/dvb/ca.h>
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#include <linux/socket.h>
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#include "dmxdev.h"
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#include "dvbdev.h"
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#include "dvb_demux.h"
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#include "dvb_frontend.h"
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#include "dvb_ringbuffer.h"
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#include "dvb_ca_en50221.h"
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#include "dvb_net.h"
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#include "cxd2099.h"
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/* MSI had problems with lost interrupts, fixed but needs testing */
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#undef CONFIG_PCI_MSI
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#define DDB_MAX_I2C 4
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#define DDB_MAX_PORT 4
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#define DDB_MAX_INPUT 8
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#define DDB_MAX_OUTPUT 4
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#define DDB_MAX_LINK 4
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#define DDB_LINK_SHIFT 28
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#define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
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#define DDB_XO2_TYPE_NONE 0
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#define DDB_XO2_TYPE_DUOFLEX 1
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#define DDB_XO2_TYPE_CI 2
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struct ddb_info {
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int type;
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#define DDB_NONE 0
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#define DDB_OCTOPUS 1
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#define DDB_OCTOPUS_MAX_CT 6
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char *name;
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int port_num;
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u32 port_type[DDB_MAX_PORT];
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u32 board_control;
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u32 board_control_2;
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u8 ts_quirks;
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#define TS_QUIRK_SERIAL 1
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#define TS_QUIRK_REVERSED 2
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#define TS_QUIRK_ALT_OSC 8
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};
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/* DMA_SIZE MUST be divisible by 188 and 128 !!! */
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#define INPUT_DMA_MAX_BUFS 32 /* hardware table limit */
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#define INPUT_DMA_BUFS 8
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#define INPUT_DMA_SIZE (128*47*21)
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#define OUTPUT_DMA_MAX_BUFS 32
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#define OUTPUT_DMA_BUFS 8
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#define OUTPUT_DMA_SIZE (128*47*21)
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struct ddb;
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struct ddb_port;
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struct ddb_input {
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struct ddb_port *port;
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u32 nr;
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int attached;
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dma_addr_t pbuf[INPUT_DMA_MAX_BUFS];
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u8 *vbuf[INPUT_DMA_MAX_BUFS];
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u32 dma_buf_num;
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u32 dma_buf_size;
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struct tasklet_struct tasklet;
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spinlock_t lock;
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wait_queue_head_t wq;
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int running;
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u32 stat;
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u32 cbuf;
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u32 coff;
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struct dvb_adapter adap;
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struct dvb_device *dev;
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struct i2c_client *i2c_client[1];
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struct dvb_frontend *fe;
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struct dvb_frontend *fe2;
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struct dmxdev dmxdev;
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struct dvb_demux demux;
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struct dvb_net dvbnet;
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struct dmx_frontend hw_frontend;
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struct dmx_frontend mem_frontend;
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int users;
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int (*gate_ctrl)(struct dvb_frontend *, int);
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};
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struct ddb_output {
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struct ddb_port *port;
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u32 nr;
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dma_addr_t pbuf[OUTPUT_DMA_MAX_BUFS];
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u8 *vbuf[OUTPUT_DMA_MAX_BUFS];
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u32 dma_buf_num;
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u32 dma_buf_size;
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struct tasklet_struct tasklet;
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spinlock_t lock;
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wait_queue_head_t wq;
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int running;
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u32 stat;
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u32 cbuf;
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u32 coff;
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struct dvb_adapter adap;
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struct dvb_device *dev;
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};
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struct ddb_i2c {
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struct ddb *dev;
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u32 nr;
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struct i2c_adapter adap;
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struct i2c_adapter adap2;
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u32 regs;
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u32 rbuf;
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u32 wbuf;
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int done;
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wait_queue_head_t wq;
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};
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struct ddb_port {
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struct ddb *dev;
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u32 nr;
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struct ddb_i2c *i2c;
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struct mutex i2c_gate_lock;
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u32 class;
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#define DDB_PORT_NONE 0
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#define DDB_PORT_CI 1
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#define DDB_PORT_TUNER 2
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u32 type;
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#define DDB_TUNER_NONE 0
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#define DDB_TUNER_DVBS_ST 1
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#define DDB_TUNER_DVBS_ST_AA 2
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#define DDB_TUNER_DVBCT2_SONY_P 7
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#define DDB_TUNER_DVBC2T2_SONY_P 8
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#define DDB_TUNER_ISDBT_SONY_P 9
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#define DDB_TUNER_DVBS_STV0910_P 10
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#define DDB_TUNER_DVBS_STV0910_PR 14
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#define DDB_TUNER_DVBC2T2I_SONY_P 15
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#define DDB_TUNER_DVBCT_TR 16
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#define DDB_TUNER_DVBCT_ST 17
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#define DDB_TUNER_XO2_DVBS_STV0910 32
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#define DDB_TUNER_XO2_DVBCT2_SONY 33
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#define DDB_TUNER_XO2_ISDBT_SONY 34
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#define DDB_TUNER_XO2_DVBC2T2_SONY 35
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#define DDB_TUNER_XO2_ATSC_ST 36
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#define DDB_TUNER_XO2_DVBC2T2I_SONY 37
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u32 adr;
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struct ddb_input *input[2];
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struct ddb_output *output;
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struct dvb_ca_en50221 *en;
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};
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struct ddb {
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struct pci_dev *pdev;
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unsigned char __iomem *regs;
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struct ddb_port port[DDB_MAX_PORT];
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struct ddb_i2c i2c[DDB_MAX_I2C];
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struct ddb_input input[DDB_MAX_INPUT];
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struct ddb_output output[DDB_MAX_OUTPUT];
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struct device *ddb_dev;
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int nr;
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u8 iobuf[1028];
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struct ddb_info *info;
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int msi;
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};
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/****************************************************************************/
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#define ddbwritel(_val, _adr) writel((_val), \
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dev->regs+(_adr))
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#define ddbreadl(_adr) readl(dev->regs+(_adr))
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#define ddbcpyto(_adr, _src, _count) memcpy_toio(dev->regs+(_adr), (_src), (_count))
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#define ddbcpyfrom(_dst, _adr, _count) memcpy_fromio((_dst), dev->regs+(_adr), (_count))
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/****************************************************************************/
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static inline u32 safe_ddbreadl(struct ddb *dev, u32 adr)
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{
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u32 val = ddbreadl(adr);
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/* (ddb)readl returns (uint)-1 (all bits set) on failure, catch that */
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if (val == ~0) {
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dev_err(&dev->pdev->dev, "ddbreadl failure, adr=%08x\n", adr);
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return 0;
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}
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return val;
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}
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/****************************************************************************/
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/* ddbridge-main.c (modparams) */
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extern int xo2_speed;
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extern int stv0910_single;
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/* ddbridge-core.c */
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void ddb_ports_detach(struct ddb *dev);
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void ddb_ports_release(struct ddb *dev);
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void ddb_buffers_free(struct ddb *dev);
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void ddb_device_destroy(struct ddb *dev);
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irqreturn_t irq_handler(int irq, void *dev_id);
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void ddb_ports_init(struct ddb *dev);
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int ddb_buffers_alloc(struct ddb *dev);
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int ddb_ports_attach(struct ddb *dev);
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int ddb_device_create(struct ddb *dev);
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int ddb_class_create(void);
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void ddb_class_destroy(void);
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#endif
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