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![Boris Brezillon](/assets/img/avatar_default.png)
We are planning to share more code between different NAND based devices (SPI NAND, OneNAND and raw NANDs), but before doing that we need to move the existing include/linux/mtd/nand.h file into include/linux/mtd/rawnand.h so we can later create a nand.h header containing all common structure and function prototypes. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Peter Pan <peterpandong@micron.com> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Han Xu <han.xu@nxp.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-By: Harvey Hunt <harveyhuntnexus@gmail.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Halasa <khalasa@piap.pl>
232 lines
5.1 KiB
C
232 lines
5.1 KiB
C
/*
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* Copyright (C) 2006-2007 PA Semi, Inc
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*
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* Author: Egor Martovetsky <egor@pasemi.com>
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* Maintained by: Olof Johansson <olof@lixom.net>
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*
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* Driver for the PWRficient onchip NAND flash interface
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#undef DEBUG
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#define LBICTRL_LPCCTL_NR 0x00004000
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#define CLE_PIN_CTL 15
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#define ALE_PIN_CTL 14
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static unsigned int lpcctl;
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static struct mtd_info *pasemi_nand_mtd;
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static const char driver_name[] = "pasemi-nand";
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static void pasemi_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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while (len > 0x800) {
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memcpy_fromio(buf, chip->IO_ADDR_R, 0x800);
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buf += 0x800;
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len -= 0x800;
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}
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memcpy_fromio(buf, chip->IO_ADDR_R, len);
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}
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static void pasemi_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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while (len > 0x800) {
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memcpy_toio(chip->IO_ADDR_R, buf, 0x800);
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buf += 0x800;
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len -= 0x800;
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}
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memcpy_toio(chip->IO_ADDR_R, buf, len);
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}
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static void pasemi_hwcontrol(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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if (cmd == NAND_CMD_NONE)
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return;
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if (ctrl & NAND_CLE)
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out_8(chip->IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
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else
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out_8(chip->IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
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/* Push out posted writes */
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eieio();
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inl(lpcctl);
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}
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int pasemi_device_ready(struct mtd_info *mtd)
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{
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return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
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}
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static int pasemi_nand_probe(struct platform_device *ofdev)
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{
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struct device *dev = &ofdev->dev;
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struct pci_dev *pdev;
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struct device_node *np = dev->of_node;
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struct resource res;
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struct nand_chip *chip;
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int err = 0;
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err = of_address_to_resource(np, 0, &res);
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if (err)
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return -EINVAL;
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/* We only support one device at the moment */
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if (pasemi_nand_mtd)
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return -ENODEV;
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dev_dbg(dev, "pasemi_nand at %pR\n", &res);
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/* Allocate memory for MTD device structure and private data */
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chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
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if (!chip) {
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err = -ENOMEM;
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goto out;
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}
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pasemi_nand_mtd = nand_to_mtd(chip);
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/* Link the private data with the MTD structure */
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pasemi_nand_mtd->dev.parent = dev;
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chip->IO_ADDR_R = of_iomap(np, 0);
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chip->IO_ADDR_W = chip->IO_ADDR_R;
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if (!chip->IO_ADDR_R) {
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err = -EIO;
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goto out_mtd;
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}
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pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
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if (!pdev) {
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err = -ENODEV;
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goto out_ior;
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}
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lpcctl = pci_resource_start(pdev, 0);
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pci_dev_put(pdev);
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if (!request_region(lpcctl, 4, driver_name)) {
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err = -EBUSY;
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goto out_ior;
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}
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chip->cmd_ctrl = pasemi_hwcontrol;
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chip->dev_ready = pasemi_device_ready;
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chip->read_buf = pasemi_read_buf;
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chip->write_buf = pasemi_write_buf;
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chip->chip_delay = 0;
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chip->ecc.mode = NAND_ECC_SOFT;
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chip->ecc.algo = NAND_ECC_HAMMING;
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/* Enable the following for a flash based bad block table */
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chip->bbt_options = NAND_BBT_USE_FLASH;
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/* Scan to find existence of the device */
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err = nand_scan(pasemi_nand_mtd, 1);
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if (err)
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goto out_lpc;
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if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
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dev_err(dev, "Unable to register MTD device\n");
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err = -ENODEV;
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goto out_lpc;
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}
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dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res,
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lpcctl);
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return 0;
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out_lpc:
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release_region(lpcctl, 4);
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out_ior:
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iounmap(chip->IO_ADDR_R);
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out_mtd:
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kfree(chip);
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out:
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return err;
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}
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static int pasemi_nand_remove(struct platform_device *ofdev)
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{
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struct nand_chip *chip;
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if (!pasemi_nand_mtd)
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return 0;
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chip = mtd_to_nand(pasemi_nand_mtd);
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/* Release resources, unregister device */
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nand_release(pasemi_nand_mtd);
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release_region(lpcctl, 4);
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iounmap(chip->IO_ADDR_R);
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/* Free the MTD device structure */
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kfree(chip);
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pasemi_nand_mtd = NULL;
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return 0;
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}
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static const struct of_device_id pasemi_nand_match[] =
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{
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{
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.compatible = "pasemi,localbus-nand",
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, pasemi_nand_match);
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static struct platform_driver pasemi_nand_driver =
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{
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.driver = {
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.name = driver_name,
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.of_match_table = pasemi_nand_match,
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},
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.probe = pasemi_nand_probe,
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.remove = pasemi_nand_remove,
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};
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module_platform_driver(pasemi_nand_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
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MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");
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