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![Lionel Landwerlin](/assets/img/avatar_default.png)
The design of the OA unit has been split into several units. We now have a global unit (OAG) and a render specific unit (OAR). This leads to some changes on how we program things. Some details : OAR: - has its own set of counter registers, they are per-context saved/restored - counters are not written to the circular OA buffer - a snapshot of the counters can be acquired with MI_RECORD_PERF_COUNT, or a single counter can be read with MI_STORE_REGISTER_MEM. OAG: - has global counters that increment across context switches - counters are written into the circular OA buffer (if requested) v2: Fix checkpatch warnings on code style (Lucas) v3: (Umesh) - Update register from which tail, status and head are read - Update logic to sample context reports - Update whitelist mux and b counter regs v4: Fix a bug when updating context image for new contexts (Umesh) v5: Squash patch enabling save/restore of counters into context image We want this so we can preempt performance queries and keep the system responsive even when long running queries are ongoing. We avoid doing it for all contexts. - use LRI to modify context control (Chris) - use MASKED_FIELD to program just the masked bits (Chris) - disable save/restore of counters on cleanup (Chris) v6: Do not use implicit parameters (Chris) BSpec: 28727, 30021 Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by: Chris Wilson <chris.p.wilson@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191025193746.47155-2-umesh.nerlige.ramappa@intel.com
274 lines
7 KiB
Makefile
274 lines
7 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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# Add a set of useful warning flags and enable -Werror for CI to prevent
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# trivial mistakes from creeping in. We have to do this piecemeal as we reject
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# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
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# need to filter out dubious warnings. Still it is our interest
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# to keep running locally with W=1 C=1 until we are completely clean.
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#
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# Note the danger in using -Wall -Wextra is that when CI updates gcc we
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# will most likely get a sudden build breakage... Hopefully we will fix
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# new warnings before CI updates!
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subdir-ccflags-y := -Wall -Wextra
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subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
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subdir-ccflags-y += $(call cc-disable-warning, type-limits)
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subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
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subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
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# clang warnings
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subdir-ccflags-y += $(call cc-disable-warning, sign-compare)
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subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)
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subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
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subdir-ccflags-y += $(call cc-disable-warning, uninitialized)
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subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
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# Fine grained warnings disable
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CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
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CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
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subdir-ccflags-y += \
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$(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
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# Extra header tests
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header-test-pattern-$(CONFIG_DRM_I915_WERROR) := *.h
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subdir-ccflags-y += -I$(srctree)/$(src)
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# Please keep these build lists sorted!
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# core driver code
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i915-y += i915_drv.o \
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i915_irq.o \
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i915_getparam.o \
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i915_params.o \
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i915_pci.o \
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i915_scatterlist.o \
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i915_suspend.o \
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i915_switcheroo.o \
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i915_sysfs.o \
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i915_utils.o \
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intel_csr.o \
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intel_device_info.o \
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intel_memory_region.o \
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intel_pch.o \
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intel_pm.o \
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intel_runtime_pm.o \
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intel_sideband.o \
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intel_uncore.o \
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intel_wakeref.o
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# core library code
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i915-y += \
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i915_memcpy.o \
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i915_mm.o \
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i915_sw_fence.o \
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i915_sw_fence_work.o \
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i915_syncmap.o \
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i915_user_extensions.o
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i915-$(CONFIG_COMPAT) += i915_ioc32.o
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i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o display/intel_pipe_crc.o
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i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
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# "Graphics Technology" (aka we talk to the gpu)
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obj-y += gt/
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gt-y += \
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gt/intel_breadcrumbs.o \
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gt/intel_context.o \
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gt/intel_engine_cs.o \
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gt/intel_engine_heartbeat.o \
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gt/intel_engine_pm.o \
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gt/intel_engine_pool.o \
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gt/intel_engine_user.o \
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gt/intel_gt.o \
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gt/intel_gt_irq.o \
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gt/intel_gt_pm.o \
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gt/intel_gt_pm_irq.o \
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gt/intel_gt_requests.o \
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gt/intel_llc.o \
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gt/intel_lrc.o \
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gt/intel_mocs.o \
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gt/intel_rc6.o \
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gt/intel_renderstate.o \
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gt/intel_reset.o \
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gt/intel_ring.o \
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gt/intel_ring_submission.o \
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gt/intel_rps.o \
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gt/intel_sseu.o \
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gt/intel_timeline.o \
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gt/intel_workarounds.o
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# autogenerated null render state
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gt-y += \
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gt/gen6_renderstate.o \
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gt/gen7_renderstate.o \
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gt/gen8_renderstate.o \
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gt/gen9_renderstate.o
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i915-y += $(gt-y)
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# GEM (Graphics Execution Management) code
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obj-y += gem/
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gem-y += \
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gem/i915_gem_busy.o \
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gem/i915_gem_clflush.o \
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gem/i915_gem_client_blt.o \
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gem/i915_gem_context.o \
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gem/i915_gem_dmabuf.o \
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gem/i915_gem_domain.o \
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gem/i915_gem_execbuffer.o \
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gem/i915_gem_fence.o \
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gem/i915_gem_internal.o \
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gem/i915_gem_object.o \
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gem/i915_gem_object_blt.o \
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gem/i915_gem_lmem.o \
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gem/i915_gem_mman.o \
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gem/i915_gem_pages.o \
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gem/i915_gem_phys.o \
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gem/i915_gem_pm.o \
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gem/i915_gem_region.o \
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gem/i915_gem_shmem.o \
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gem/i915_gem_shrinker.o \
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gem/i915_gem_stolen.o \
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gem/i915_gem_throttle.o \
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gem/i915_gem_tiling.o \
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gem/i915_gem_userptr.o \
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gem/i915_gem_wait.o \
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gem/i915_gemfs.o
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i915-y += \
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$(gem-y) \
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i915_active.o \
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i915_buddy.o \
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i915_cmd_parser.o \
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i915_gem_evict.o \
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i915_gem_fence_reg.o \
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i915_gem_gtt.o \
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i915_gem.o \
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i915_globals.o \
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i915_query.o \
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i915_request.o \
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i915_scheduler.o \
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i915_trace_points.o \
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i915_vma.o \
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intel_region_lmem.o \
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intel_wopcm.o
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# general-purpose microcontroller (GuC) support
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obj-y += gt/uc/
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i915-y += gt/uc/intel_uc.o \
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gt/uc/intel_uc_fw.o \
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gt/uc/intel_guc.o \
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gt/uc/intel_guc_ads.o \
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gt/uc/intel_guc_ct.o \
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gt/uc/intel_guc_fw.o \
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gt/uc/intel_guc_log.o \
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gt/uc/intel_guc_submission.o \
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gt/uc/intel_huc.o \
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gt/uc/intel_huc_fw.o
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# modesetting core code
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obj-y += display/
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i915-y += \
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display/intel_atomic.o \
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display/intel_atomic_plane.o \
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display/intel_audio.o \
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display/intel_bios.o \
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display/intel_bw.o \
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display/intel_cdclk.o \
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display/intel_color.o \
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display/intel_combo_phy.o \
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display/intel_connector.o \
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display/intel_display.o \
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display/intel_display_power.o \
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display/intel_dpio_phy.o \
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display/intel_dpll_mgr.o \
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display/intel_dsb.o \
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display/intel_fbc.o \
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display/intel_fifo_underrun.o \
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display/intel_frontbuffer.o \
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display/intel_hdcp.o \
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display/intel_hotplug.o \
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display/intel_lpe_audio.o \
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display/intel_overlay.o \
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display/intel_psr.o \
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display/intel_quirks.o \
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display/intel_sprite.o \
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display/intel_tc.o \
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display/intel_vga.o
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i915-$(CONFIG_ACPI) += \
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display/intel_acpi.o \
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display/intel_opregion.o
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i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
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display/intel_fbdev.o
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# modesetting output/encoder code
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i915-y += \
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display/dvo_ch7017.o \
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display/dvo_ch7xxx.o \
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display/dvo_ivch.o \
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display/dvo_ns2501.o \
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display/dvo_sil164.o \
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display/dvo_tfp410.o \
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display/icl_dsi.o \
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display/intel_crt.o \
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display/intel_ddi.o \
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display/intel_dp.o \
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display/intel_dp_aux_backlight.o \
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display/intel_dp_link_training.o \
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display/intel_dp_mst.o \
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display/intel_dsi.o \
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display/intel_dsi_dcs_backlight.o \
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display/intel_dsi_vbt.o \
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display/intel_dvo.o \
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display/intel_gmbus.o \
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display/intel_hdmi.o \
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display/intel_lspcon.o \
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display/intel_lvds.o \
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display/intel_panel.o \
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display/intel_sdvo.o \
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display/intel_tv.o \
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display/intel_vdsc.o \
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display/vlv_dsi.o \
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display/vlv_dsi_pll.o
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# perf code
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obj-y += oa/
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i915-y += \
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oa/i915_oa_hsw.o \
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oa/i915_oa_bdw.o \
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oa/i915_oa_chv.o \
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oa/i915_oa_sklgt2.o \
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oa/i915_oa_sklgt3.o \
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oa/i915_oa_sklgt4.o \
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oa/i915_oa_bxt.o \
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oa/i915_oa_kblgt2.o \
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oa/i915_oa_kblgt3.o \
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oa/i915_oa_glk.o \
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oa/i915_oa_cflgt2.o \
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oa/i915_oa_cflgt3.o \
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oa/i915_oa_cnl.o \
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oa/i915_oa_icl.o \
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oa/i915_oa_tgl.o
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i915-y += i915_perf.o
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# Post-mortem debug and GPU hang state capture
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i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
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i915-$(CONFIG_DRM_I915_SELFTEST) += \
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gem/selftests/igt_gem_utils.o \
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selftests/i915_random.o \
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selftests/i915_selftest.o \
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selftests/igt_flush_test.o \
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selftests/igt_live_test.o \
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selftests/igt_reset.o \
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selftests/igt_spinner.o
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# virtual gpu code
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i915-y += i915_vgpu.o
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ifeq ($(CONFIG_DRM_I915_GVT),y)
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i915-y += intel_gvt.o
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include $(src)/gvt/Makefile
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endif
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obj-$(CONFIG_DRM_I915) += i915.o
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obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o
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