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![Jeff Garzik](/assets/img/avatar_default.png)
- Eliminate casts to/from void* - Eliminate checks for conditions that never occur. These typically fall into two classes: 1) Checking for 'dev_id == NULL', then it is never called with NULL as an argument. 2) Checking for invalid irq number, when the only caller (the system) guarantees the irq handler is called with the proper 'irq' number argument. Signed-off-by: Jeff Garzik <jeff@garzik.org>
839 lines
22 KiB
C
839 lines
22 KiB
C
/*
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* drivers/serial/mpc52xx_uart.c
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*
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* Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
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*
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* FIXME According to the usermanual the status bits in the status register
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* are only updated when the peripherals access the FIFO and not when the
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* CPU access them. So since we use this bits to know when we stop writing
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* and reading, they may not be updated in-time and a race condition may
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* exists. But I haven't be able to prove this and I don't care. But if
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* any problem arises, it might worth checking. The TX/RX FIFO Stats
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* registers should be used in addition.
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* Update: Actually, they seem updated ... At least the bits we use.
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*
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*
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* Maintainer : Sylvain Munaut <tnt@246tNt.com>
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*
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* Some of the code has been inspired/copied from the 2.4 code written
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* by Dale Farnsworth <dfarnsworth@mvista.com>.
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*
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* Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2003 MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/* Platform device Usage :
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*
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* Since PSCs can have multiple function, the correct driver for each one
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* is selected by calling mpc52xx_match_psc_function(...). The function
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* handled by this driver is "uart".
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*
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* The driver init all necessary registers to place the PSC in uart mode without
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* DCD. However, the pin multiplexing aren't changed and should be set either
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* by the bootloader or in the platform init code.
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*
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* The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
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* and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
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* so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
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* fpr the console code : without this 1:1 mapping, at early boot time, when we
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* are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
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* will be mapped to.
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*/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/tty.h>
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#include <linux/serial.h>
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#include <linux/sysrq.h>
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#include <linux/console.h>
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#include <asm/delay.h>
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#include <asm/io.h>
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#include <asm/mpc52xx.h>
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#include <asm/mpc52xx_psc.h>
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#if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/serial_core.h>
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/* We've been assigned a range on the "Low-density serial ports" major */
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#define SERIAL_PSC_MAJOR 204
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#define SERIAL_PSC_MINOR 148
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#define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
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static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
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/* Rem: - We use the read_status_mask as a shadow of
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* psc->mpc52xx_psc_imr
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* - It's important that is array is all zero on start as we
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* use it to know if it's initialized or not ! If it's not sure
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* it's cleared, then a memset(...,0,...) should be added to
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* the console_init
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*/
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#define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
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/* Forward declaration of the interruption handling routine */
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static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
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/* Simple macro to test if a port is console or not. This one is taken
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* for serial_core.c and maybe should be moved to serial_core.h ? */
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#ifdef CONFIG_SERIAL_CORE_CONSOLE
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#define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
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#else
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#define uart_console(port) (0)
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#endif
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/* ======================================================================== */
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/* UART operations */
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/* ======================================================================== */
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static unsigned int
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mpc52xx_uart_tx_empty(struct uart_port *port)
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{
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int status = in_be16(&PSC(port)->mpc52xx_psc_status);
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return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
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}
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static void
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mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* Not implemented */
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}
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static unsigned int
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mpc52xx_uart_get_mctrl(struct uart_port *port)
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{
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/* Not implemented */
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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}
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static void
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mpc52xx_uart_stop_tx(struct uart_port *port)
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{
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/* port->lock taken by caller */
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port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
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}
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static void
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mpc52xx_uart_start_tx(struct uart_port *port)
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{
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/* port->lock taken by caller */
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port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
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}
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static void
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mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
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{
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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port->x_char = ch;
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if (ch) {
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/* Make sure tx interrupts are on */
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/* Truly necessary ??? They should be anyway */
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port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
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}
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static void
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mpc52xx_uart_stop_rx(struct uart_port *port)
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{
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/* port->lock taken by caller */
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port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
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out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
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}
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static void
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mpc52xx_uart_enable_ms(struct uart_port *port)
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{
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/* Not implemented */
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}
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static void
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mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
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{
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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if ( ctl == -1 )
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out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
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else
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out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int
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mpc52xx_uart_startup(struct uart_port *port)
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{
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struct mpc52xx_psc __iomem *psc = PSC(port);
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int ret;
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/* Request IRQ */
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ret = request_irq(port->irq, mpc52xx_uart_int,
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IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
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if (ret)
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return ret;
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/* Reset/activate the port, clear and enable interrupts */
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out_8(&psc->command,MPC52xx_PSC_RST_RX);
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out_8(&psc->command,MPC52xx_PSC_RST_TX);
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out_be32(&psc->sicr,0); /* UART mode DCD ignored */
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out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
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out_8(&psc->rfcntl, 0x00);
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out_be16(&psc->rfalarm, 0x1ff);
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out_8(&psc->tfcntl, 0x07);
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out_be16(&psc->tfalarm, 0x80);
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port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
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out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
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out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
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out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
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return 0;
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}
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static void
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mpc52xx_uart_shutdown(struct uart_port *port)
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{
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struct mpc52xx_psc __iomem *psc = PSC(port);
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/* Shut down the port, interrupt and all */
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out_8(&psc->command,MPC52xx_PSC_RST_RX);
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out_8(&psc->command,MPC52xx_PSC_RST_TX);
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port->read_status_mask = 0;
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out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
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/* Release interrupt */
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free_irq(port->irq, port);
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}
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static void
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mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
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struct termios *old)
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{
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struct mpc52xx_psc __iomem *psc = PSC(port);
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unsigned long flags;
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unsigned char mr1, mr2;
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unsigned short ctr;
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unsigned int j, baud, quot;
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/* Prepare what we're gonna write */
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mr1 = 0;
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switch (new->c_cflag & CSIZE) {
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case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
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break;
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case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
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break;
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case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
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break;
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case CS8:
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default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
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}
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if (new->c_cflag & PARENB) {
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mr1 |= (new->c_cflag & PARODD) ?
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MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
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} else
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mr1 |= MPC52xx_PSC_MODE_PARNONE;
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mr2 = 0;
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if (new->c_cflag & CSTOPB)
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mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
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else
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mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
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MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
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MPC52xx_PSC_MODE_ONE_STOP;
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baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
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quot = uart_get_divisor(port, baud);
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ctr = quot & 0xffff;
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/* Get the lock */
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spin_lock_irqsave(&port->lock, flags);
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/* Update the per-port timeout */
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uart_update_timeout(port, new->c_cflag, baud);
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/* Do our best to flush TX & RX, so we don't loose anything */
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/* But we don't wait indefinitly ! */
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j = 5000000; /* Maximum wait */
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/* FIXME Can't receive chars since set_termios might be called at early
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* boot for the console, all stuff is not yet ready to receive at that
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* time and that just makes the kernel oops */
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/* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
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while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
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--j)
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udelay(1);
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if (!j)
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printk( KERN_ERR "mpc52xx_uart.c: "
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"Unable to flush RX & TX fifos in-time in set_termios."
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"Some chars may have been lost.\n" );
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/* Reset the TX & RX */
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out_8(&psc->command,MPC52xx_PSC_RST_RX);
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out_8(&psc->command,MPC52xx_PSC_RST_TX);
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/* Send new mode settings */
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out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
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out_8(&psc->mode,mr1);
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out_8(&psc->mode,mr2);
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out_8(&psc->ctur,ctr >> 8);
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out_8(&psc->ctlr,ctr & 0xff);
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/* Reenable TX & RX */
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out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
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out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
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/* We're all set, release the lock */
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *
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mpc52xx_uart_type(struct uart_port *port)
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{
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return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
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}
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static void
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mpc52xx_uart_release_port(struct uart_port *port)
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{
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if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
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iounmap(port->membase);
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port->membase = NULL;
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}
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release_mem_region(port->mapbase, MPC52xx_PSC_SIZE);
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}
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static int
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mpc52xx_uart_request_port(struct uart_port *port)
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{
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int err;
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if (port->flags & UPF_IOREMAP) /* Need to remap ? */
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port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
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if (!port->membase)
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return -EINVAL;
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err = request_mem_region(port->mapbase, MPC52xx_PSC_SIZE,
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"mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
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if (err && (port->flags & UPF_IOREMAP)) {
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iounmap(port->membase);
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port->membase = NULL;
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}
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return err;
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}
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static void
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mpc52xx_uart_config_port(struct uart_port *port, int flags)
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{
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if ( (flags & UART_CONFIG_TYPE) &&
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(mpc52xx_uart_request_port(port) == 0) )
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port->type = PORT_MPC52xx;
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}
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static int
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mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
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{
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if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
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return -EINVAL;
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if ( (ser->irq != port->irq) ||
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(ser->io_type != SERIAL_IO_MEM) ||
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(ser->baud_base != port->uartclk) ||
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(ser->iomem_base != (void*)port->mapbase) ||
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(ser->hub6 != 0 ) )
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return -EINVAL;
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return 0;
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}
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static struct uart_ops mpc52xx_uart_ops = {
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.tx_empty = mpc52xx_uart_tx_empty,
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.set_mctrl = mpc52xx_uart_set_mctrl,
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.get_mctrl = mpc52xx_uart_get_mctrl,
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.stop_tx = mpc52xx_uart_stop_tx,
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.start_tx = mpc52xx_uart_start_tx,
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.send_xchar = mpc52xx_uart_send_xchar,
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.stop_rx = mpc52xx_uart_stop_rx,
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.enable_ms = mpc52xx_uart_enable_ms,
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.break_ctl = mpc52xx_uart_break_ctl,
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.startup = mpc52xx_uart_startup,
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.shutdown = mpc52xx_uart_shutdown,
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.set_termios = mpc52xx_uart_set_termios,
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/* .pm = mpc52xx_uart_pm, Not supported yet */
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/* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
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.type = mpc52xx_uart_type,
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.release_port = mpc52xx_uart_release_port,
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.request_port = mpc52xx_uart_request_port,
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.config_port = mpc52xx_uart_config_port,
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.verify_port = mpc52xx_uart_verify_port
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};
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/* ======================================================================== */
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/* Interrupt handling */
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/* ======================================================================== */
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static inline int
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mpc52xx_uart_int_rx_chars(struct uart_port *port)
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{
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struct tty_struct *tty = port->info->tty;
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unsigned char ch, flag;
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unsigned short status;
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/* While we can read, do so ! */
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while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
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MPC52xx_PSC_SR_RXRDY) {
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/* Get the char */
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ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
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/* Handle sysreq char */
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#ifdef SUPPORT_SYSRQ
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if (uart_handle_sysrq_char(port, ch)) {
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port->sysrq = 0;
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continue;
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}
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#endif
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/* Store it */
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flag = TTY_NORMAL;
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port->icount.rx++;
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if ( status & (MPC52xx_PSC_SR_PE |
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MPC52xx_PSC_SR_FE |
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MPC52xx_PSC_SR_RB) ) {
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if (status & MPC52xx_PSC_SR_RB) {
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flag = TTY_BREAK;
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uart_handle_break(port);
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} else if (status & MPC52xx_PSC_SR_PE)
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flag = TTY_PARITY;
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else if (status & MPC52xx_PSC_SR_FE)
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flag = TTY_FRAME;
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/* Clear error condition */
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out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
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}
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tty_insert_flip_char(tty, ch, flag);
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if (status & MPC52xx_PSC_SR_OE) {
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/*
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* Overrun is special, since it's
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* reported immediately, and doesn't
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* affect the current character
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*/
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tty_insert_flip_char(tty, 0, TTY_OVERRUN);
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}
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}
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tty_flip_buffer_push(tty);
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return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
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}
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static inline int
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mpc52xx_uart_int_tx_chars(struct uart_port *port)
|
|
{
|
|
struct circ_buf *xmit = &port->info->xmit;
|
|
|
|
/* Process out of band chars */
|
|
if (port->x_char) {
|
|
out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
|
|
port->icount.tx++;
|
|
port->x_char = 0;
|
|
return 1;
|
|
}
|
|
|
|
/* Nothing to do ? */
|
|
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
|
|
mpc52xx_uart_stop_tx(port);
|
|
return 0;
|
|
}
|
|
|
|
/* Send chars */
|
|
while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
|
|
out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
|
|
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
|
port->icount.tx++;
|
|
if (uart_circ_empty(xmit))
|
|
break;
|
|
}
|
|
|
|
/* Wake up */
|
|
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
|
uart_write_wakeup(port);
|
|
|
|
/* Maybe we're done after all */
|
|
if (uart_circ_empty(xmit)) {
|
|
mpc52xx_uart_stop_tx(port);
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static irqreturn_t
|
|
mpc52xx_uart_int(int irq, void *dev_id)
|
|
{
|
|
struct uart_port *port = dev_id;
|
|
unsigned long pass = ISR_PASS_LIMIT;
|
|
unsigned int keepgoing;
|
|
unsigned short status;
|
|
|
|
spin_lock(&port->lock);
|
|
|
|
/* While we have stuff to do, we continue */
|
|
do {
|
|
/* If we don't find anything to do, we stop */
|
|
keepgoing = 0;
|
|
|
|
/* Read status */
|
|
status = in_be16(&PSC(port)->mpc52xx_psc_isr);
|
|
status &= port->read_status_mask;
|
|
|
|
/* Do we need to receive chars ? */
|
|
/* For this RX interrupts must be on and some chars waiting */
|
|
if ( status & MPC52xx_PSC_IMR_RXRDY )
|
|
keepgoing |= mpc52xx_uart_int_rx_chars(port);
|
|
|
|
/* Do we need to send chars ? */
|
|
/* For this, TX must be ready and TX interrupt enabled */
|
|
if ( status & MPC52xx_PSC_IMR_TXRDY )
|
|
keepgoing |= mpc52xx_uart_int_tx_chars(port);
|
|
|
|
/* Limit number of iteration */
|
|
if ( !(--pass) )
|
|
keepgoing = 0;
|
|
|
|
} while (keepgoing);
|
|
|
|
spin_unlock(&port->lock);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
|
|
/* ======================================================================== */
|
|
/* Console ( if applicable ) */
|
|
/* ======================================================================== */
|
|
|
|
#ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
|
|
|
|
static void __init
|
|
mpc52xx_console_get_options(struct uart_port *port,
|
|
int *baud, int *parity, int *bits, int *flow)
|
|
{
|
|
struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
unsigned char mr1;
|
|
|
|
/* Read the mode registers */
|
|
out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
|
|
mr1 = in_8(&psc->mode);
|
|
|
|
/* CT{U,L}R are write-only ! */
|
|
*baud = __res.bi_baudrate ?
|
|
__res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
|
|
|
|
/* Parse them */
|
|
switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
|
|
case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
|
|
case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
|
|
case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
|
|
case MPC52xx_PSC_MODE_8_BITS:
|
|
default: *bits = 8;
|
|
}
|
|
|
|
if (mr1 & MPC52xx_PSC_MODE_PARNONE)
|
|
*parity = 'n';
|
|
else
|
|
*parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
|
|
}
|
|
|
|
static void
|
|
mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
|
|
{
|
|
struct uart_port *port = &mpc52xx_uart_ports[co->index];
|
|
struct mpc52xx_psc __iomem *psc = PSC(port);
|
|
unsigned int i, j;
|
|
|
|
/* Disable interrupts */
|
|
out_be16(&psc->mpc52xx_psc_imr, 0);
|
|
|
|
/* Wait the TX buffer to be empty */
|
|
j = 5000000; /* Maximum wait */
|
|
while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
|
|
--j)
|
|
udelay(1);
|
|
|
|
/* Write all the chars */
|
|
for (i = 0; i < count; i++, s++) {
|
|
/* Line return handling */
|
|
if (*s == '\n')
|
|
out_8(&psc->mpc52xx_psc_buffer_8, '\r');
|
|
|
|
/* Send the char */
|
|
out_8(&psc->mpc52xx_psc_buffer_8, *s);
|
|
|
|
/* Wait the TX buffer to be empty */
|
|
j = 20000; /* Maximum wait */
|
|
while (!(in_be16(&psc->mpc52xx_psc_status) &
|
|
MPC52xx_PSC_SR_TXEMP) && --j)
|
|
udelay(1);
|
|
}
|
|
|
|
/* Restore interrupt state */
|
|
out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
|
|
}
|
|
|
|
static int __init
|
|
mpc52xx_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port = &mpc52xx_uart_ports[co->index];
|
|
|
|
int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
|
|
return -EINVAL;
|
|
|
|
/* Basic port init. Needed since we use some uart_??? func before
|
|
* real init for early access */
|
|
spin_lock_init(&port->lock);
|
|
port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
|
|
port->ops = &mpc52xx_uart_ops;
|
|
port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
|
|
|
|
/* We ioremap ourself */
|
|
port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
|
|
if (port->membase == NULL)
|
|
return -EINVAL;
|
|
|
|
/* Setup the port parameters accoding to options */
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
|
|
static struct uart_driver mpc52xx_uart_driver;
|
|
|
|
static struct console mpc52xx_console = {
|
|
.name = "ttyPSC",
|
|
.write = mpc52xx_console_write,
|
|
.device = uart_console_device,
|
|
.setup = mpc52xx_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
|
|
.data = &mpc52xx_uart_driver,
|
|
};
|
|
|
|
|
|
static int __init
|
|
mpc52xx_console_init(void)
|
|
{
|
|
register_console(&mpc52xx_console);
|
|
return 0;
|
|
}
|
|
|
|
console_initcall(mpc52xx_console_init);
|
|
|
|
#define MPC52xx_PSC_CONSOLE &mpc52xx_console
|
|
#else
|
|
#define MPC52xx_PSC_CONSOLE NULL
|
|
#endif
|
|
|
|
|
|
/* ======================================================================== */
|
|
/* UART Driver */
|
|
/* ======================================================================== */
|
|
|
|
static struct uart_driver mpc52xx_uart_driver = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "mpc52xx_psc_uart",
|
|
.dev_name = "ttyPSC",
|
|
.major = SERIAL_PSC_MAJOR,
|
|
.minor = SERIAL_PSC_MINOR,
|
|
.nr = MPC52xx_PSC_MAXNUM,
|
|
.cons = MPC52xx_PSC_CONSOLE,
|
|
};
|
|
|
|
|
|
/* ======================================================================== */
|
|
/* Platform Driver */
|
|
/* ======================================================================== */
|
|
|
|
static int __devinit
|
|
mpc52xx_uart_probe(struct platform_device *dev)
|
|
{
|
|
struct resource *res = dev->resource;
|
|
|
|
struct uart_port *port = NULL;
|
|
int i, idx, ret;
|
|
|
|
/* Check validity & presence */
|
|
idx = dev->id;
|
|
if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
|
|
return -EINVAL;
|
|
|
|
if (!mpc52xx_match_psc_function(idx,"uart"))
|
|
return -ENODEV;
|
|
|
|
/* Init the port structure */
|
|
port = &mpc52xx_uart_ports[idx];
|
|
|
|
memset(port, 0x00, sizeof(struct uart_port));
|
|
|
|
spin_lock_init(&port->lock);
|
|
port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
|
|
port->fifosize = 512;
|
|
port->iotype = UPIO_MEM;
|
|
port->flags = UPF_BOOT_AUTOCONF |
|
|
( uart_console(port) ? 0 : UPF_IOREMAP );
|
|
port->line = idx;
|
|
port->ops = &mpc52xx_uart_ops;
|
|
|
|
/* Search for IRQ and mapbase */
|
|
for (i=0 ; i<dev->num_resources ; i++, res++) {
|
|
if (res->flags & IORESOURCE_MEM)
|
|
port->mapbase = res->start;
|
|
else if (res->flags & IORESOURCE_IRQ)
|
|
port->irq = res->start;
|
|
}
|
|
if (!port->irq || !port->mapbase)
|
|
return -EINVAL;
|
|
|
|
/* Add the port to the uart sub-system */
|
|
ret = uart_add_one_port(&mpc52xx_uart_driver, port);
|
|
if (!ret)
|
|
platform_set_drvdata(dev, (void*)port);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
mpc52xx_uart_remove(struct platform_device *dev)
|
|
{
|
|
struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
|
|
|
|
platform_set_drvdata(dev, NULL);
|
|
|
|
if (port)
|
|
uart_remove_one_port(&mpc52xx_uart_driver, port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int
|
|
mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
|
|
|
|
if (sport)
|
|
uart_suspend_port(&mpc52xx_uart_driver, port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
mpc52xx_uart_resume(struct platform_device *dev)
|
|
{
|
|
struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
|
|
|
|
if (port)
|
|
uart_resume_port(&mpc52xx_uart_driver, port);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static struct platform_driver mpc52xx_uart_platform_driver = {
|
|
.probe = mpc52xx_uart_probe,
|
|
.remove = mpc52xx_uart_remove,
|
|
#ifdef CONFIG_PM
|
|
.suspend = mpc52xx_uart_suspend,
|
|
.resume = mpc52xx_uart_resume,
|
|
#endif
|
|
.driver = {
|
|
.name = "mpc52xx-psc",
|
|
},
|
|
};
|
|
|
|
|
|
/* ======================================================================== */
|
|
/* Module */
|
|
/* ======================================================================== */
|
|
|
|
static int __init
|
|
mpc52xx_uart_init(void)
|
|
{
|
|
int ret;
|
|
|
|
printk(KERN_INFO "Serial: MPC52xx PSC driver\n");
|
|
|
|
ret = uart_register_driver(&mpc52xx_uart_driver);
|
|
if (ret == 0) {
|
|
ret = platform_driver_register(&mpc52xx_uart_platform_driver);
|
|
if (ret)
|
|
uart_unregister_driver(&mpc52xx_uart_driver);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit
|
|
mpc52xx_uart_exit(void)
|
|
{
|
|
platform_driver_unregister(&mpc52xx_uart_platform_driver);
|
|
uart_unregister_driver(&mpc52xx_uart_driver);
|
|
}
|
|
|
|
|
|
module_init(mpc52xx_uart_init);
|
|
module_exit(mpc52xx_uart_exit);
|
|
|
|
MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
|
|
MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
|
|
MODULE_LICENSE("GPL");
|