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816c5248df
This patch enables both CAN0 and CAN1, both exposed via connectors found on the expansion board. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
85 lines
1.3 KiB
Text
85 lines
1.3 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the RZ/G2[MN] HiHope sub board common parts
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*
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* Copyright (C) 2019 Renesas Electronics Corp.
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*/
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/ {
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aliases {
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ethernet0 = &avb;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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};
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};
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&avb {
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pinctrl-0 = <&avb_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy0>;
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phy-mode = "rgmii-txid";
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status = "okay";
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phy0: ethernet-phy@0 {
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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};
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};
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&can0 {
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pinctrl-0 = <&can0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&can1 {
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pinctrl-0 = <&can1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pciec0 {
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status = "okay";
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};
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&pciec1 {
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status = "okay";
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};
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&pfc {
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pinctrl-0 = <&scif_clk_pins>;
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pinctrl-names = "default";
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avb_pins: avb {
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mux {
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groups = "avb_link", "avb_mdio", "avb_mii";
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function = "avb";
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};
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pins_mdio {
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groups = "avb_mdio";
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drive-strength = <24>;
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};
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pins_mii_tx {
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pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
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"PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
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drive-strength = <12>;
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};
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};
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can0_pins: can0 {
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groups = "can0_data_a";
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function = "can0";
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};
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can1_pins: can1 {
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groups = "can1_data";
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function = "can1";
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};
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};
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