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![Stephen Boyd](/assets/img/avatar_default.png)
The atomic64 library uses a handful of static spin locks to implement
atomic 64-bit operations on architectures without support for atomic
64-bit instructions.
Unfortunately, the spinlocks are initialized in a pure initcall and that
is too late for the vfs namespace code which wants to use atomic64
operations before the initcall is run.
This became a problem as of commit 8823c079ba
: "vfs: Add setns support
for the mount namespace".
This leads to BUG messages such as:
BUG: spinlock bad magic on CPU#0, swapper/0/0
lock: atomic64_lock+0x240/0x400, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0
do_raw_spin_lock+0x158/0x198
_raw_spin_lock_irqsave+0x4c/0x58
atomic64_add_return+0x30/0x5c
alloc_mnt_ns.clone.14+0x44/0xac
create_mnt_ns+0xc/0x54
mnt_init+0x120/0x1d4
vfs_caches_init+0xe0/0x10c
start_kernel+0x29c/0x300
coming out early on during boot when spinlock debugging is enabled.
Fix this by initializing the spinlocks statically at compile time.
Reported-and-tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Cc: Eric W. Biederman <ebiederm@xmission.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
179 lines
4.2 KiB
C
179 lines
4.2 KiB
C
/*
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* Generic implementation of 64-bit atomics using spinlocks,
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* useful on processors that don't have 64-bit atomic instructions.
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*
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* Copyright © 2009 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/types.h>
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#include <linux/cache.h>
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#include <linux/spinlock.h>
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/atomic.h>
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/*
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* We use a hashed array of spinlocks to provide exclusive access
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* to each atomic64_t variable. Since this is expected to used on
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* systems with small numbers of CPUs (<= 4 or so), we use a
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* relatively small array of 16 spinlocks to avoid wasting too much
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* memory on the spinlock array.
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*/
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#define NR_LOCKS 16
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/*
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* Ensure each lock is in a separate cacheline.
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*/
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static union {
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raw_spinlock_t lock;
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char pad[L1_CACHE_BYTES];
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} atomic64_lock[NR_LOCKS] __cacheline_aligned_in_smp = {
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[0 ... (NR_LOCKS - 1)] = {
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.lock = __RAW_SPIN_LOCK_UNLOCKED(atomic64_lock.lock),
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},
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};
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static inline raw_spinlock_t *lock_addr(const atomic64_t *v)
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{
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unsigned long addr = (unsigned long) v;
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addr >>= L1_CACHE_SHIFT;
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addr ^= (addr >> 8) ^ (addr >> 16);
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return &atomic64_lock[addr & (NR_LOCKS - 1)].lock;
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}
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long long atomic64_read(const atomic64_t *v)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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long long val;
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raw_spin_lock_irqsave(lock, flags);
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val = v->counter;
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raw_spin_unlock_irqrestore(lock, flags);
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return val;
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}
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EXPORT_SYMBOL(atomic64_read);
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void atomic64_set(atomic64_t *v, long long i)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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raw_spin_lock_irqsave(lock, flags);
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v->counter = i;
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raw_spin_unlock_irqrestore(lock, flags);
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}
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EXPORT_SYMBOL(atomic64_set);
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void atomic64_add(long long a, atomic64_t *v)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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raw_spin_lock_irqsave(lock, flags);
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v->counter += a;
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raw_spin_unlock_irqrestore(lock, flags);
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}
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EXPORT_SYMBOL(atomic64_add);
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long long atomic64_add_return(long long a, atomic64_t *v)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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long long val;
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raw_spin_lock_irqsave(lock, flags);
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val = v->counter += a;
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raw_spin_unlock_irqrestore(lock, flags);
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return val;
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}
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EXPORT_SYMBOL(atomic64_add_return);
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void atomic64_sub(long long a, atomic64_t *v)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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raw_spin_lock_irqsave(lock, flags);
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v->counter -= a;
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raw_spin_unlock_irqrestore(lock, flags);
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}
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EXPORT_SYMBOL(atomic64_sub);
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long long atomic64_sub_return(long long a, atomic64_t *v)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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long long val;
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raw_spin_lock_irqsave(lock, flags);
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val = v->counter -= a;
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raw_spin_unlock_irqrestore(lock, flags);
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return val;
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}
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EXPORT_SYMBOL(atomic64_sub_return);
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long long atomic64_dec_if_positive(atomic64_t *v)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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long long val;
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raw_spin_lock_irqsave(lock, flags);
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val = v->counter - 1;
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if (val >= 0)
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v->counter = val;
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raw_spin_unlock_irqrestore(lock, flags);
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return val;
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}
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EXPORT_SYMBOL(atomic64_dec_if_positive);
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long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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long long val;
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raw_spin_lock_irqsave(lock, flags);
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val = v->counter;
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if (val == o)
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v->counter = n;
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raw_spin_unlock_irqrestore(lock, flags);
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return val;
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}
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EXPORT_SYMBOL(atomic64_cmpxchg);
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long long atomic64_xchg(atomic64_t *v, long long new)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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long long val;
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raw_spin_lock_irqsave(lock, flags);
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val = v->counter;
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v->counter = new;
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raw_spin_unlock_irqrestore(lock, flags);
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return val;
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}
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EXPORT_SYMBOL(atomic64_xchg);
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int atomic64_add_unless(atomic64_t *v, long long a, long long u)
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{
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unsigned long flags;
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raw_spinlock_t *lock = lock_addr(v);
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int ret = 0;
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raw_spin_lock_irqsave(lock, flags);
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if (v->counter != u) {
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v->counter += a;
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ret = 1;
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}
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raw_spin_unlock_irqrestore(lock, flags);
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return ret;
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}
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EXPORT_SYMBOL(atomic64_add_unless);
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