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8a1e6bb3f7
Krzysztof Kozlowski's @canonical.com email stopped working, so switch to generic @kernel.org account for all Devicetree bindings. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20220330074016.12896-2-krzysztof.kozlowski@linaro.org
52 lines
1.3 KiB
YAML
52 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-gpio-bank.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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- Sylwester Nawrocki <s.nawrocki@samsung.com>
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- Tomasz Figa <tomasz.figa@gmail.com>
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description: |
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This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
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controller.
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GPIO bank description for Samsung S3C/S5P/Exynos SoC pin controller.
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See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
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additional information and example.
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properties:
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'#gpio-cells':
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const: 2
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gpio-controller: true
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'#interrupt-cells':
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description:
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For GPIO banks supporting external GPIO interrupts or external wake-up
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interrupts.
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const: 2
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interrupt-controller:
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description:
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For GPIO banks supporting external GPIO interrupts or external wake-up
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interrupts.
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interrupts:
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description:
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For GPIO banks supporting direct external wake-up interrupts (without
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multiplexing). Number of interrupts must match number of wake-up capable
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pins of this bank.
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minItems: 1
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maxItems: 8
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required:
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- '#gpio-cells'
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- gpio-controller
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additionalProperties: false
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