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4294f8baaf
Convert the gic interrupt controller to use irq domains in preparation for device-tree binding and MULTI_IRQ. This allows for translation between GIC interrupt IDs and Linux irq numbers. The meaning of irq_offset has changed. It now is just the number of skipped GIC interrupt IDs for the controller. It will be 16 for primary GIC and 32 for secondary GICs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
42 lines
494 B
Text
42 lines
494 B
Text
config ARM_GIC
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select IRQ_DOMAIN
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bool
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config ARM_VIC
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bool
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config ARM_VIC_NR
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int
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default 4 if ARCH_S5PV210
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default 3 if ARCH_S5PC100
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default 2
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depends on ARM_VIC
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help
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The maximum number of VICs available in the system, for
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power management.
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config ICST
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bool
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config PL330
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bool
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config SA1111
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bool
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select DMABOUNCE if !ARCH_PXA
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config DMABOUNCE
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bool
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select ZONE_DMA
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config TIMER_ACORN
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bool
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config SHARP_LOCOMO
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bool
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config SHARP_PARAM
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bool
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config SHARP_SCOOP
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bool
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