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ac6d704679
Passing a 64-bit address width to iommu_setup_dma_ops() is valid on virtual platforms, but isn't currently possible. The overflow check in iommu_dma_init_domain() prevents this even when @dma_base isn't 0. Pass a limit address instead of a size, so callers don't have to fake a size to work around the check. The base and limit parameters are being phased out, because: * they are redundant for x86 callers. dma-iommu already reserves the first page, and the upper limit is already in domain->geometry. * they can now be obtained from dev->dma_range_map on Arm. But removing them on Arm isn't completely straightforward so is left for future work. As an intermediate step, simplify the x86 callers by passing dummy limits. Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/20210618152059.1194210-5-jean-philippe@linaro.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
87 lines
2.1 KiB
C
87 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2014-2015 ARM Ltd.
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*/
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#ifndef __DMA_IOMMU_H
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#define __DMA_IOMMU_H
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#include <linux/errno.h>
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#include <linux/types.h>
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#ifdef CONFIG_IOMMU_DMA
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#include <linux/dma-mapping.h>
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#include <linux/iommu.h>
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#include <linux/msi.h>
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/* Domain management interface for IOMMU drivers */
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int iommu_get_dma_cookie(struct iommu_domain *domain);
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int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base);
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void iommu_put_dma_cookie(struct iommu_domain *domain);
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/* Setup call for arch DMA mapping code */
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void iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 dma_limit);
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/* The DMA API isn't _quite_ the whole story, though... */
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/*
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* iommu_dma_prepare_msi() - Map the MSI page in the IOMMU device
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*
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* The MSI page will be stored in @desc.
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*
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* Return: 0 on success otherwise an error describing the failure.
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*/
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int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr);
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/* Update the MSI message if required. */
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void iommu_dma_compose_msi_msg(struct msi_desc *desc,
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struct msi_msg *msg);
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void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list);
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void iommu_dma_free_cpu_cached_iovas(unsigned int cpu,
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struct iommu_domain *domain);
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extern bool iommu_dma_forcedac;
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#else /* CONFIG_IOMMU_DMA */
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struct iommu_domain;
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struct msi_desc;
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struct msi_msg;
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struct device;
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static inline void iommu_setup_dma_ops(struct device *dev, u64 dma_base,
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u64 dma_limit)
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{
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}
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static inline int iommu_get_dma_cookie(struct iommu_domain *domain)
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{
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return -ENODEV;
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}
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static inline int iommu_get_msi_cookie(struct iommu_domain *domain, dma_addr_t base)
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{
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return -ENODEV;
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}
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static inline void iommu_put_dma_cookie(struct iommu_domain *domain)
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{
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}
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static inline int iommu_dma_prepare_msi(struct msi_desc *desc,
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phys_addr_t msi_addr)
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{
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return 0;
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}
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static inline void iommu_dma_compose_msi_msg(struct msi_desc *desc,
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struct msi_msg *msg)
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{
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}
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static inline void iommu_dma_get_resv_regions(struct device *dev, struct list_head *list)
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{
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}
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#endif /* CONFIG_IOMMU_DMA */
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#endif /* __DMA_IOMMU_H */
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