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![Linus Torvalds](/assets/img/avatar_default.png)
Core changes: - Disallow open drain and open source flags to be set simultaneously. This doesn't make electrical sense, and would the hardware actually respond to this setting, the result would be short circuit. - ACPI GPIO has a new core infrastructure for handling quirks. The quirks are there to deal with broken ACPI tables centrally instead of pushing the work to individual drivers. In the world of BIOS writers, the ACPI tables are perfect. Until they find a mistake in it. When such a mistake is found, we can patch it with a quirk. It should never happen, the problem is that it happens. So we accomodate for it. - Several documentation updates. - Revert the patch setting up initial direction state from reading the device. This was causing bad things for drivers that can't read status on all its pins. It is only affecting debugfs information quality. - Label descriptors with the device name if no explicit label is passed in. - Pave the ground for transitioning SPI and regulators to use GPIO descriptors by implementing some quirks in the device tree GPIO parsing code. New drivers: - New driver for the Access PCIe IDIO 24 family. Other: - Major refactorings and improvements to the GPIO mockup driver used for test and verification. - Moved the AXP209 driver over to pin control since it gained a pin control back-end. These patches will appear (with the same hashes) in the pin control pull request as well. - Convert the onewire GPIO driver w1-gpio to use descriptors. This is merged here since the W1 maintainers send very few pull requests and he ACKed it. - Start to clean up driver headers using <linux/gpio.h> to just use <linux/gpio/driver.h> as appropriate. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJacIW6AAoJEEEQszewGV1z9b0P/jxWKaCAGFTTu/HZQ79RBAFq w33nIazzoh+88sN7A9xKexpr4ibOxiCvOwkTtrUBNaxGGy5fslj4+OY5BzunEfBK 1vYxyEqtenvvZK03pOd6CSfHKV+vD5ngnVHGdtGzRvtmDDiSgtzqyEyUhQcXM+l7 PrEh6qrd4TBZezlVR8kn5eqcmclkCBVSQCuLSq+ThMmCKRZuOdf1Im3D6eBzh1/N P81HdcglqbSsfUl1RcFiHs9Z+KcZOq83CNl2Ej1LePK2JBZbmkx9dR+WSJmV1u4P 6wvzFcQDhfGEiiteg2BS5c+o6aAyShpuRNut+2MLre8icmdfpqUEqFotHbfQjW5y sqaejGsJ5aHcRBq7UUM+F9s1R0iN3tlafi3L0WEhl0Tn5huRQq3Uqcw6e5l+XrWd 0h+b5PbKJZO/iqzRhSl+rhc0V2CFDJOCwvY+JX6356fvrcF0T6LhvKfDYtKU3Iyb HB0RG1OcYe228f96azvafCkFyBIYX9mqHBvOXpQQgrZQYXfN1rupLvpOhxC+Wbvn nsGE2bdD6HA1bytTbkxbL+QWP7faHf5YVcZpaN7UWbO3sOzL46fj8eHwHUim95Tr pR5kDZRhZd8+9SCNZ/ttpaEbis9MOqS/3Mlxrj4GXtfFFmR53hjFy2bG/Z7R2RB0 MlSEJRc8iDIs+1j3D2RR =k5nL -----END PGP SIGNATURE----- Merge tag 'gpio-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO updates from Linus Walleij: "The is the bulk of GPIO changes for the v4.16 kernel cycle. It is pretty calm this time around I think. I even got time to get to things like starting to clean up header includes. Core changes: - Disallow open drain and open source flags to be set simultaneously. This doesn't make electrical sense, and would the hardware actually respond to this setting, the result would be short circuit. - ACPI GPIO has a new core infrastructure for handling quirks. The quirks are there to deal with broken ACPI tables centrally instead of pushing the work to individual drivers. In the world of BIOS writers, the ACPI tables are perfect. Until they find a mistake in it. When such a mistake is found, we can patch it with a quirk. It should never happen, the problem is that it happens. So we accomodate for it. - Several documentation updates. - Revert the patch setting up initial direction state from reading the device. This was causing bad things for drivers that can't read status on all its pins. It is only affecting debugfs information quality. - Label descriptors with the device name if no explicit label is passed in. - Pave the ground for transitioning SPI and regulators to use GPIO descriptors by implementing some quirks in the device tree GPIO parsing code. New drivers: - New driver for the Access PCIe IDIO 24 family. Other: - Major refactorings and improvements to the GPIO mockup driver used for test and verification. - Moved the AXP209 driver over to pin control since it gained a pin control back-end. These patches will appear (with the same hashes) in the pin control pull request as well. - Convert the onewire GPIO driver w1-gpio to use descriptors. This is merged here since the W1 maintainers send very few pull requests and he ACKed it. - Start to clean up driver headers using <linux/gpio.h> to just use <linux/gpio/driver.h> as appropriate" * tag 'gpio-v4.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (103 commits) gpio: Timestamp events in hardirq handler gpio: Fix kernel stack leak to userspace gpio: Fix a documentation spelling mistake gpio: Documentation update gpiolib: remove redundant initialization of pointer desc gpio: of: Fix NPE from OF flags gpio: stmpe: Delete an unnecessary variable initialisation in stmpe_gpio_probe() gpio: stmpe: Move an assignment in stmpe_gpio_probe() gpio: stmpe: Improve a size determination in stmpe_gpio_probe() gpio: stmpe: Use seq_putc() in stmpe_dbg_show() gpio: No NULL owner gpio: stmpe: i2c transfer are forbiden in atomic context gpio: davinci: Include proper header gpio: da905x: Include proper header gpio: cs5535: Include proper header gpio: crystalcove: Include proper header gpio: bt8xx: Include proper header gpio: bcm-kona: Include proper header gpio: arizona: Include proper header gpio: amd8111: Include proper header ...
202 lines
5 KiB
C
202 lines
5 KiB
C
/*
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* 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <linux/spi/spi.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio/consumer.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#define GEN_74X164_NUMBER_GPIOS 8
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struct gen_74x164_chip {
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struct gpio_chip gpio_chip;
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struct mutex lock;
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struct gpio_desc *gpiod_oe;
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u32 registers;
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/*
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* Since the registers are chained, every byte sent will make
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* the previous byte shift to the next register in the
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* chain. Thus, the first byte sent will end up in the last
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* register at the end of the transfer. So, to have a logical
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* numbering, store the bytes in reverse order.
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*/
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u8 buffer[];
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};
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static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
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{
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return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
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chip->registers);
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}
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static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
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{
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struct gen_74x164_chip *chip = gpiochip_get_data(gc);
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u8 bank = chip->registers - 1 - offset / 8;
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u8 pin = offset % 8;
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int ret;
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mutex_lock(&chip->lock);
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ret = (chip->buffer[bank] >> pin) & 0x1;
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mutex_unlock(&chip->lock);
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return ret;
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}
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static void gen_74x164_set_value(struct gpio_chip *gc,
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unsigned offset, int val)
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{
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struct gen_74x164_chip *chip = gpiochip_get_data(gc);
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u8 bank = chip->registers - 1 - offset / 8;
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u8 pin = offset % 8;
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mutex_lock(&chip->lock);
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if (val)
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chip->buffer[bank] |= (1 << pin);
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else
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chip->buffer[bank] &= ~(1 << pin);
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__gen_74x164_write_config(chip);
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mutex_unlock(&chip->lock);
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}
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static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
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unsigned long *bits)
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{
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struct gen_74x164_chip *chip = gpiochip_get_data(gc);
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unsigned int i, idx, shift;
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u8 bank, bankmask;
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mutex_lock(&chip->lock);
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for (i = 0, bank = chip->registers - 1; i < chip->registers;
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i++, bank--) {
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idx = i / sizeof(*mask);
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shift = i % sizeof(*mask) * BITS_PER_BYTE;
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bankmask = mask[idx] >> shift;
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if (!bankmask)
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continue;
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chip->buffer[bank] &= ~bankmask;
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chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
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}
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__gen_74x164_write_config(chip);
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mutex_unlock(&chip->lock);
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}
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static int gen_74x164_direction_output(struct gpio_chip *gc,
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unsigned offset, int val)
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{
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gen_74x164_set_value(gc, offset, val);
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return 0;
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}
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static int gen_74x164_probe(struct spi_device *spi)
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{
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struct gen_74x164_chip *chip;
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u32 nregs;
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int ret;
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/*
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* bits_per_word cannot be configured in platform data
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*/
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spi->bits_per_word = 8;
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ret = spi_setup(spi);
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if (ret < 0)
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return ret;
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if (of_property_read_u32(spi->dev.of_node, "registers-number",
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&nregs)) {
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dev_err(&spi->dev,
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"Missing registers-number property in the DT.\n");
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return -EINVAL;
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}
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chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
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GPIOD_OUT_LOW);
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if (IS_ERR(chip->gpiod_oe))
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return PTR_ERR(chip->gpiod_oe);
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gpiod_set_value_cansleep(chip->gpiod_oe, 1);
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spi_set_drvdata(spi, chip);
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chip->gpio_chip.label = spi->modalias;
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chip->gpio_chip.direction_output = gen_74x164_direction_output;
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chip->gpio_chip.get = gen_74x164_get_value;
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chip->gpio_chip.set = gen_74x164_set_value;
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chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
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chip->gpio_chip.base = -1;
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chip->registers = nregs;
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chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
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chip->gpio_chip.can_sleep = true;
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chip->gpio_chip.parent = &spi->dev;
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chip->gpio_chip.owner = THIS_MODULE;
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mutex_init(&chip->lock);
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ret = __gen_74x164_write_config(chip);
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if (ret) {
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dev_err(&spi->dev, "Failed writing: %d\n", ret);
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goto exit_destroy;
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}
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ret = gpiochip_add_data(&chip->gpio_chip, chip);
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if (!ret)
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return 0;
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exit_destroy:
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mutex_destroy(&chip->lock);
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return ret;
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}
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static int gen_74x164_remove(struct spi_device *spi)
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{
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struct gen_74x164_chip *chip = spi_get_drvdata(spi);
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gpiod_set_value_cansleep(chip->gpiod_oe, 0);
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gpiochip_remove(&chip->gpio_chip);
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mutex_destroy(&chip->lock);
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return 0;
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}
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static const struct of_device_id gen_74x164_dt_ids[] = {
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{ .compatible = "fairchild,74hc595" },
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{ .compatible = "nxp,74lvc594" },
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{},
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};
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MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
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static struct spi_driver gen_74x164_driver = {
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.driver = {
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.name = "74x164",
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.of_match_table = gen_74x164_dt_ids,
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},
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.probe = gen_74x164_probe,
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.remove = gen_74x164_remove,
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};
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module_spi_driver(gen_74x164_driver);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
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MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
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MODULE_LICENSE("GPL v2");
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