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![Bhumika Goyal](/assets/img/avatar_default.png)
Declare watchdog_ops structures as const as they are only stored in the ops field of a watchdog_device structure. This field is of type const, so watchdog_ops structures having this property can be made const too. Done using Coccinelle: @r disable optional_qualifier@ identifier x; position p; @@ static struct watchdog_ops x@p={...}; @ok@ struct watchdog_device w; identifier r.x; position p; @@ w.ops=&x@p; @bad@ position p != {r.p,ok.p}; identifier r.x; @@ x@p @depends on !bad disable optional_qualifier@ identifier r.x; @@ +const struct watchdog_ops x; File size details before and after patching. First line of every .o file shows the file size before patching and second line shows the size after patching. text data bss dec hex filename 1340 544 0 1884 75c drivers/watchdog/bcm_kona_wdt.o 1436 440 0 1876 754 drivers/watchdog/bcm_kona_wdt.o 1176 544 4 1724 6bc drivers/watchdog/digicolor_wdt.o 1272 440 4 1716 6b4 drivers/watchdog/digicolor_wdt.o 925 580 89 1594 63a drivers/watchdog/ep93xx_wdt.o 1021 476 89 1586 632 drivers/watchdog/ep93xx_wdt.o 4932 288 17 5237 1475 drivers/watchdog/s3c2410_wdt.o 5028 192 17 5237 1475 drivers/watchdog/s3c2410_wdt.o 1977 292 1 2270 8de drivers/watchdog/sama5d4_wdt.o 2073 196 1 2270 8de drivers/watchdog/sama5d4_wdt.o 1375 484 1 1860 744 drivers/watchdog/sirfsoc_wdt.o 1471 380 1 1852 73c drivers/watchdog/sirfsoc_wdt.o Size remains the same for the files drivers/watchdog/diag288_wdt.o drivers/watchdog/asm9260_wdt.o and drivers/watchdog/atlas7_wdt.o The following .o files did not compile: drivers/watchdog/sun4v_wdt.o, drivers/watchdog/sbsa_gwdt.o, drivers/watchdog/rt2880_wdt.o, drivers/watchdog/booke_wdt.o drivers/watchdog/mt7621_wdt.o Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
243 lines
5.9 KiB
C
243 lines
5.9 KiB
C
/*
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* Watchdog timer for PowerPC Book-E systems
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*
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* Author: Matthew McClintock
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* Maintainer: Kumar Gala <galak@kernel.crashing.org>
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*
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* Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/watchdog.h>
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#include <asm/reg_booke.h>
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#include <asm/time.h>
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#include <asm/div64.h>
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/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
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* Also, the wdt_period sets the watchdog timer period timeout.
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* For E500 cpus the wdt_period sets which bit changing from 0->1 will
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* trigger a watchog timeout. This watchdog timeout will occur 3 times, the
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* first time nothing will happen, the second time a watchdog exception will
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* occur, and the final time the board will reset.
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*/
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#ifdef CONFIG_PPC_FSL_BOOK3E
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#define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
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#define WDTP_MASK (WDTP(0x3f))
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#else
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#define WDTP(x) (TCR_WP(x))
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#define WDTP_MASK (TCR_WP_MASK)
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#endif
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static bool booke_wdt_enabled;
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module_param(booke_wdt_enabled, bool, 0);
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static int booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
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module_param(booke_wdt_period, int, 0);
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#ifdef CONFIG_PPC_FSL_BOOK3E
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/* For the specified period, determine the number of seconds
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* corresponding to the reset time. There will be a watchdog
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* exception at approximately 3/5 of this time.
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*
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* The formula to calculate this is given by:
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* 2.5 * (2^(63-period+1)) / timebase_freq
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*
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* In order to simplify things, we assume that period is
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* at least 1. This will still result in a very long timeout.
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*/
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static unsigned long long period_to_sec(unsigned int period)
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{
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unsigned long long tmp = 1ULL << (64 - period);
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unsigned long tmp2 = ppc_tb_freq;
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/* tmp may be a very large number and we don't want to overflow,
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* so divide the timebase freq instead of multiplying tmp
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*/
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tmp2 = tmp2 / 5 * 2;
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do_div(tmp, tmp2);
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return tmp;
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}
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/*
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* This procedure will find the highest period which will give a timeout
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* greater than the one required. e.g. for a bus speed of 66666666 and
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* and a parameter of 2 secs, then this procedure will return a value of 38.
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*/
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static unsigned int sec_to_period(unsigned int secs)
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{
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unsigned int period;
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for (period = 63; period > 0; period--) {
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if (period_to_sec(period) >= secs)
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return period;
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}
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return 0;
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}
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#define MAX_WDT_TIMEOUT period_to_sec(1)
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#else /* CONFIG_PPC_FSL_BOOK3E */
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static unsigned long long period_to_sec(unsigned int period)
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{
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return period;
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}
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static unsigned int sec_to_period(unsigned int secs)
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{
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return secs;
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}
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#define MAX_WDT_TIMEOUT 3 /* from Kconfig */
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#endif /* !CONFIG_PPC_FSL_BOOK3E */
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static void __booke_wdt_set(void *data)
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{
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u32 val;
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struct watchdog_device *wdog = data;
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val = mfspr(SPRN_TCR);
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val &= ~WDTP_MASK;
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val |= WDTP(sec_to_period(wdog->timeout));
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mtspr(SPRN_TCR, val);
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}
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static void booke_wdt_set(void *data)
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{
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on_each_cpu(__booke_wdt_set, data, 0);
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}
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static void __booke_wdt_ping(void *data)
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{
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mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
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}
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static int booke_wdt_ping(struct watchdog_device *wdog)
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{
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on_each_cpu(__booke_wdt_ping, NULL, 0);
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return 0;
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}
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static void __booke_wdt_enable(void *data)
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{
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u32 val;
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struct watchdog_device *wdog = data;
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/* clear status before enabling watchdog */
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__booke_wdt_ping(NULL);
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val = mfspr(SPRN_TCR);
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val &= ~WDTP_MASK;
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val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(sec_to_period(wdog->timeout)));
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mtspr(SPRN_TCR, val);
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}
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/**
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* booke_wdt_disable - disable the watchdog on the given CPU
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*
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* This function is called on each CPU. It disables the watchdog on that CPU.
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*
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* TCR[WRC] cannot be changed once it has been set to non-zero, but we can
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* effectively disable the watchdog by setting its period to the maximum value.
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*/
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static void __booke_wdt_disable(void *data)
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{
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u32 val;
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val = mfspr(SPRN_TCR);
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val &= ~(TCR_WIE | WDTP_MASK);
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mtspr(SPRN_TCR, val);
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/* clear status to make sure nothing is pending */
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__booke_wdt_ping(NULL);
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}
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static int booke_wdt_start(struct watchdog_device *wdog)
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{
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on_each_cpu(__booke_wdt_enable, wdog, 0);
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pr_debug("watchdog enabled (timeout = %u sec)\n", wdog->timeout);
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return 0;
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}
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static int booke_wdt_stop(struct watchdog_device *wdog)
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{
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on_each_cpu(__booke_wdt_disable, NULL, 0);
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pr_debug("watchdog disabled\n");
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return 0;
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}
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static int booke_wdt_set_timeout(struct watchdog_device *wdt_dev,
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unsigned int timeout)
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{
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wdt_dev->timeout = timeout;
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booke_wdt_set(wdt_dev);
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return 0;
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}
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static struct watchdog_info booke_wdt_info __ro_after_init = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "PowerPC Book-E Watchdog",
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};
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static const struct watchdog_ops booke_wdt_ops = {
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.owner = THIS_MODULE,
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.start = booke_wdt_start,
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.stop = booke_wdt_stop,
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.ping = booke_wdt_ping,
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.set_timeout = booke_wdt_set_timeout,
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};
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static struct watchdog_device booke_wdt_dev = {
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.info = &booke_wdt_info,
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.ops = &booke_wdt_ops,
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.min_timeout = 1,
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};
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static void __exit booke_wdt_exit(void)
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{
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watchdog_unregister_device(&booke_wdt_dev);
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}
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static int __init booke_wdt_init(void)
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{
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int ret = 0;
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bool nowayout = WATCHDOG_NOWAYOUT;
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pr_info("powerpc book-e watchdog driver loaded\n");
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booke_wdt_info.firmware_version = cur_cpu_spec->pvr_value;
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booke_wdt_set_timeout(&booke_wdt_dev,
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period_to_sec(booke_wdt_period));
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watchdog_set_nowayout(&booke_wdt_dev, nowayout);
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booke_wdt_dev.max_timeout = MAX_WDT_TIMEOUT;
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if (booke_wdt_enabled)
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booke_wdt_start(&booke_wdt_dev);
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ret = watchdog_register_device(&booke_wdt_dev);
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return ret;
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}
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module_init(booke_wdt_init);
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module_exit(booke_wdt_exit);
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MODULE_ALIAS("booke_wdt");
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MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
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MODULE_LICENSE("GPL");
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