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79d0933032
Implement set voltage operation. Separate TS clock as a own configuration parameter. Add TS clock polarity parameter. [crope@iki.fi: merge em28xx driver m88ds3103 config change patch to that one, in order to keep build unbroken] Signed-off-by: Nibble Max <nibble.max@gmail.com> Reviewed-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
139 lines
3 KiB
C
139 lines
3 KiB
C
/*
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* Montage M88DS3103 demodulator driver
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*
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* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef M88DS3103_H
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#define M88DS3103_H
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#include <linux/dvb/frontend.h>
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struct m88ds3103_config {
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/*
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* I2C address
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* Default: none, must set
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* 0x68, ...
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*/
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u8 i2c_addr;
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/*
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* clock
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* Default: none, must set
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* 27000000
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*/
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u32 clock;
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/*
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* max bytes I2C provider is asked to write at once
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* Default: none, must set
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* 33, 65, ...
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*/
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u16 i2c_wr_max;
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/*
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* TS output mode
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* Default: M88DS3103_TS_SERIAL
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*/
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#define M88DS3103_TS_SERIAL 0 /* TS output pin D0, normal */
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#define M88DS3103_TS_SERIAL_D7 1 /* TS output pin D7 */
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#define M88DS3103_TS_PARALLEL 2 /* TS Parallel mode */
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#define M88DS3103_TS_CI 3 /* TS CI Mode */
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u8 ts_mode;
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/*
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* TS clk in KHz
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* Default: 0.
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*/
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u32 ts_clk;
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/*
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* TS clk polarity.
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* Default: 0. 1-active at falling edge; 0-active at rising edge.
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*/
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u8 ts_clk_pol:1;
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/*
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* spectrum inversion
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* Default: 0
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*/
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u8 spec_inv:1;
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/*
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* AGC polarity
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* Default: 0
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*/
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u8 agc_inv:1;
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/*
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* clock output
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* Default: M88DS3103_CLOCK_OUT_DISABLED
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*/
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#define M88DS3103_CLOCK_OUT_DISABLED 0
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#define M88DS3103_CLOCK_OUT_ENABLED 1
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#define M88DS3103_CLOCK_OUT_ENABLED_DIV2 2
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u8 clock_out;
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/*
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* DiSEqC envelope mode
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* Default: 0
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*/
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u8 envelope_mode:1;
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/*
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* AGC configuration
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* Default: none, must set
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*/
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u8 agc;
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/*
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* LNB H/V pin polarity
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* Default: 0.
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* 1: pin high set to VOLTAGE_13, pin low to set VOLTAGE_18.
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* 0: pin high set to VOLTAGE_18, pin low to set VOLTAGE_13.
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*/
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u8 lnb_hv_pol:1;
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/*
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* LNB enable pin polarity
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* Default: 0.
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* 1: pin high to enable, pin low to disable.
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* 0: pin high to disable, pin low to enable.
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*/
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u8 lnb_en_pol:1;
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};
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/*
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* Driver implements own I2C-adapter for tuner I2C access. That's since chip
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* has I2C-gate control which closes gate automatically after I2C transfer.
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* Using own I2C adapter we can workaround that.
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*/
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#if defined(CONFIG_DVB_M88DS3103) || \
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(defined(CONFIG_DVB_M88DS3103_MODULE) && defined(MODULE))
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extern struct dvb_frontend *m88ds3103_attach(
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const struct m88ds3103_config *config,
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struct i2c_adapter *i2c,
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struct i2c_adapter **tuner_i2c);
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#else
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static inline struct dvb_frontend *m88ds3103_attach(
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const struct m88ds3103_config *config,
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struct i2c_adapter *i2c,
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struct i2c_adapter **tuner_i2c)
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{
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pr_warn("%s: driver disabled by Kconfig\n", __func__);
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return NULL;
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}
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#endif
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#endif
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