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![Chris Zankel](/assets/img/avatar_default.png)
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
41 lines
1 KiB
C
41 lines
1 KiB
C
/*
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* include/asm-xtensa/bug.h
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*
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* Macros to cause a 'bug' message.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_BUG_H
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#define _XTENSA_BUG_H
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#include <linux/stringify.h>
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#define ILL __asm__ __volatile__ (".byte 0,0,0\n")
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#ifdef CONFIG_KALLSYMS
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# define BUG() do { \
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printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
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ILL; \
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} while (0)
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#else
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# define BUG() do { \
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printk("kernel BUG!\n"); \
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ILL; \
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} while (0)
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#endif
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#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
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#define PAGE_BUG(page) do { BUG(); } while (0)
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#define WARN_ON(condition) do { \
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if (unlikely((condition)!=0)) { \
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printk ("Warning in %s at %s:%d\n", __FUNCTION__, __FILE__, __LINE__); \
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dump_stack(); \
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} \
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} while (0)
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#endif /* _XTENSA_BUG_H */
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