mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-30 06:10:56 +00:00
c77bf3607a
We extend the existing RISC-V SBI earlycon support to use the new RISC-V SBI debug console extension. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20231124070905.1043092-4-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
52 lines
1.1 KiB
C
52 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* RISC-V SBI based earlycon
|
|
*
|
|
* Copyright (C) 2018 Anup Patel <anup@brainfault.org>
|
|
*/
|
|
#include <linux/kernel.h>
|
|
#include <linux/console.h>
|
|
#include <linux/init.h>
|
|
#include <linux/serial_core.h>
|
|
#include <asm/sbi.h>
|
|
|
|
static void sbi_putc(struct uart_port *port, unsigned char c)
|
|
{
|
|
sbi_console_putchar(c);
|
|
}
|
|
|
|
static void sbi_0_1_console_write(struct console *con,
|
|
const char *s, unsigned int n)
|
|
{
|
|
struct earlycon_device *dev = con->data;
|
|
uart_console_write(&dev->port, s, n, sbi_putc);
|
|
}
|
|
|
|
static void sbi_dbcn_console_write(struct console *con,
|
|
const char *s, unsigned int n)
|
|
{
|
|
int ret;
|
|
|
|
while (n) {
|
|
ret = sbi_debug_console_write(s, n);
|
|
if (ret < 0)
|
|
break;
|
|
|
|
s += ret;
|
|
n -= ret;
|
|
}
|
|
}
|
|
|
|
static int __init early_sbi_setup(struct earlycon_device *device,
|
|
const char *opt)
|
|
{
|
|
if (sbi_debug_console_available)
|
|
device->con->write = sbi_dbcn_console_write;
|
|
else if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
|
|
device->con->write = sbi_0_1_console_write;
|
|
else
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
}
|
|
EARLYCON_DECLARE(sbi, early_sbi_setup);
|