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0e6c027c03
An IRQ's effective affinity can only be different from its configured affinity if there are multiple CPUs. Make it clear that this option is only meaningful when SMP is enabled. Most of the relevant code in irqdesc.c is already hidden behind CONFIG_SMP anyway. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220701200056.46555-4-samuel@sholland.org
67 lines
1.5 KiB
Text
67 lines
1.5 KiB
Text
# SPDX-License-Identifier: GPL-2.0-only
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config ARCH_HISI
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bool "Hisilicon SoC Support"
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depends on ARCH_MULTI_V7 || (ARCH_MULTI_V5 && CPU_LITTLE_ENDIAN)
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select ARM_AMBA
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select ARM_GIC if ARCH_MULTI_V7
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select ARM_TIMER_SP804
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select POWER_RESET
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select POWER_RESET_HISI
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select POWER_SUPPLY
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if ARCH_HISI
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menu "Hisilicon platform type"
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config ARCH_HI3xxx
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bool "Hisilicon Hi36xx family"
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depends on ARCH_MULTI_V7
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select CACHE_L2X0
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select PINCTRL
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select PINCTRL_SINGLE
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help
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Support for Hisilicon Hi36xx SoC family
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config ARCH_HIP01
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bool "Hisilicon HIP01 family"
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depends on ARCH_MULTI_V7
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select ARM_GLOBAL_TIMER
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help
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Support for Hisilicon HIP01 SoC family
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config ARCH_HIP04
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bool "Hisilicon HiP04 Cortex A15 family"
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depends on ARCH_MULTI_V7
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select ARM_ERRATA_798181 if SMP
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select HAVE_ARM_ARCH_TIMER
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select MCPM if SMP
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select MCPM_QUAD_CLUSTER if SMP
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select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
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help
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Support for Hisilicon HiP04 SoC family
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config ARCH_HIX5HD2
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bool "Hisilicon X5HD2 family"
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depends on ARCH_MULTI_V7
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select CACHE_L2X0
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select HAVE_ARM_SCU if SMP
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select HAVE_ARM_TWD if SMP
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select PINCTRL
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select PINCTRL_SINGLE
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help
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Support for Hisilicon HIX5HD2 SoC family
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config ARCH_SD5203
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bool "Hisilicon SD5203 family"
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depends on ARCH_MULTI_V5
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select DW_APB_ICTL
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help
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Support for Hisilicon SD5203 SoC family
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endmenu
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endif
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