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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-22 00:40:03 +00:00
![Jakub Kicinski](/assets/img/avatar_default.png)
Trivial conflicts in net/can/isotp.c and tools/testing/selftests/net/mptcp/mptcp_connect.sh scaled_ppm_to_ppb() was moved from drivers/ptp/ptp_clock.c to include/linux/ptp_clock_kernel.h in -next so re-apply the fix there. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
562 lines
13 KiB
C
562 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Lantiq / Intel PMAC driver for XRX200 SoCs
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*
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* Copyright (C) 2010 Lantiq Deutschland
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* Copyright (C) 2012 John Crispin <john@phrozen.org>
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* Copyright (C) 2017 - 2018 Hauke Mehrtens <hauke@hauke-m.de>
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*/
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#include <linux/etherdevice.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/of_net.h>
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#include <linux/of_platform.h>
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#include <xway_dma.h>
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/* DMA */
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#define XRX200_DMA_DATA_LEN 0x600
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#define XRX200_DMA_RX 0
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#define XRX200_DMA_TX 1
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/* cpu port mac */
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#define PMAC_RX_IPG 0x0024
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#define PMAC_RX_IPG_MASK 0xf
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#define PMAC_HD_CTL 0x0000
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/* Add Ethernet header to packets from DMA to PMAC */
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#define PMAC_HD_CTL_ADD BIT(0)
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/* Add VLAN tag to Packets from DMA to PMAC */
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#define PMAC_HD_CTL_TAG BIT(1)
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/* Add CRC to packets from DMA to PMAC */
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#define PMAC_HD_CTL_AC BIT(2)
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/* Add status header to packets from PMAC to DMA */
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#define PMAC_HD_CTL_AS BIT(3)
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/* Remove CRC from packets from PMAC to DMA */
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#define PMAC_HD_CTL_RC BIT(4)
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/* Remove Layer-2 header from packets from PMAC to DMA */
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#define PMAC_HD_CTL_RL2 BIT(5)
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/* Status header is present from DMA to PMAC */
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#define PMAC_HD_CTL_RXSH BIT(6)
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/* Add special tag from PMAC to switch */
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#define PMAC_HD_CTL_AST BIT(7)
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/* Remove specail Tag from PMAC to DMA */
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#define PMAC_HD_CTL_RST BIT(8)
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/* Check CRC from DMA to PMAC */
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#define PMAC_HD_CTL_CCRC BIT(9)
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/* Enable reaction to Pause frames in the PMAC */
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#define PMAC_HD_CTL_FC BIT(10)
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struct xrx200_chan {
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int tx_free;
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struct napi_struct napi;
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struct ltq_dma_channel dma;
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struct sk_buff *skb[LTQ_DESC_NUM];
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struct xrx200_priv *priv;
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};
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struct xrx200_priv {
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struct clk *clk;
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struct xrx200_chan chan_tx;
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struct xrx200_chan chan_rx;
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struct net_device *net_dev;
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struct device *dev;
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__iomem void *pmac_reg;
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};
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static u32 xrx200_pmac_r32(struct xrx200_priv *priv, u32 offset)
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{
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return __raw_readl(priv->pmac_reg + offset);
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}
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static void xrx200_pmac_w32(struct xrx200_priv *priv, u32 val, u32 offset)
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{
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__raw_writel(val, priv->pmac_reg + offset);
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}
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static void xrx200_pmac_mask(struct xrx200_priv *priv, u32 clear, u32 set,
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u32 offset)
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{
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u32 val = xrx200_pmac_r32(priv, offset);
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val &= ~(clear);
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val |= set;
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xrx200_pmac_w32(priv, val, offset);
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}
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/* drop all the packets from the DMA ring */
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static void xrx200_flush_dma(struct xrx200_chan *ch)
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{
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int i;
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for (i = 0; i < LTQ_DESC_NUM; i++) {
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struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) != LTQ_DMA_C)
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break;
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desc->ctl = LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
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XRX200_DMA_DATA_LEN;
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ch->dma.desc++;
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ch->dma.desc %= LTQ_DESC_NUM;
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}
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}
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static int xrx200_open(struct net_device *net_dev)
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{
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struct xrx200_priv *priv = netdev_priv(net_dev);
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napi_enable(&priv->chan_tx.napi);
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ltq_dma_open(&priv->chan_tx.dma);
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ltq_dma_enable_irq(&priv->chan_tx.dma);
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napi_enable(&priv->chan_rx.napi);
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ltq_dma_open(&priv->chan_rx.dma);
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/* The boot loader does not always deactivate the receiving of frames
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* on the ports and then some packets queue up in the PPE buffers.
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* They already passed the PMAC so they do not have the tags
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* configured here. Read the these packets here and drop them.
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* The HW should have written them into memory after 10us
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*/
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usleep_range(20, 40);
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xrx200_flush_dma(&priv->chan_rx);
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ltq_dma_enable_irq(&priv->chan_rx.dma);
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netif_wake_queue(net_dev);
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return 0;
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}
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static int xrx200_close(struct net_device *net_dev)
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{
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struct xrx200_priv *priv = netdev_priv(net_dev);
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netif_stop_queue(net_dev);
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napi_disable(&priv->chan_rx.napi);
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ltq_dma_close(&priv->chan_rx.dma);
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napi_disable(&priv->chan_tx.napi);
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ltq_dma_close(&priv->chan_tx.dma);
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return 0;
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}
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static int xrx200_alloc_skb(struct xrx200_chan *ch)
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{
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struct sk_buff *skb = ch->skb[ch->dma.desc];
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dma_addr_t mapping;
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int ret = 0;
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ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(ch->priv->net_dev,
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XRX200_DMA_DATA_LEN);
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if (!ch->skb[ch->dma.desc]) {
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ret = -ENOMEM;
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goto skip;
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}
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mapping = dma_map_single(ch->priv->dev, ch->skb[ch->dma.desc]->data,
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XRX200_DMA_DATA_LEN, DMA_FROM_DEVICE);
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if (unlikely(dma_mapping_error(ch->priv->dev, mapping))) {
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dev_kfree_skb_any(ch->skb[ch->dma.desc]);
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ch->skb[ch->dma.desc] = skb;
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ret = -ENOMEM;
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goto skip;
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}
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ch->dma.desc_base[ch->dma.desc].addr = mapping;
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/* Make sure the address is written before we give it to HW */
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wmb();
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skip:
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ch->dma.desc_base[ch->dma.desc].ctl =
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LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
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XRX200_DMA_DATA_LEN;
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return ret;
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}
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static int xrx200_hw_receive(struct xrx200_chan *ch)
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{
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struct xrx200_priv *priv = ch->priv;
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struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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struct sk_buff *skb = ch->skb[ch->dma.desc];
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int len = (desc->ctl & LTQ_DMA_SIZE_MASK);
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struct net_device *net_dev = priv->net_dev;
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int ret;
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ret = xrx200_alloc_skb(ch);
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ch->dma.desc++;
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ch->dma.desc %= LTQ_DESC_NUM;
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if (ret) {
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net_dev->stats.rx_dropped++;
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netdev_err(net_dev, "failed to allocate new rx buffer\n");
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return ret;
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}
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skb_put(skb, len);
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skb->protocol = eth_type_trans(skb, net_dev);
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netif_receive_skb(skb);
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net_dev->stats.rx_packets++;
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net_dev->stats.rx_bytes += len - ETH_FCS_LEN;
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return 0;
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}
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static int xrx200_poll_rx(struct napi_struct *napi, int budget)
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{
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struct xrx200_chan *ch = container_of(napi,
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struct xrx200_chan, napi);
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int rx = 0;
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int ret;
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while (rx < budget) {
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struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
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ret = xrx200_hw_receive(ch);
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if (ret)
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return ret;
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rx++;
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} else {
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break;
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}
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}
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if (rx < budget) {
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if (napi_complete_done(&ch->napi, rx))
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ltq_dma_enable_irq(&ch->dma);
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}
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return rx;
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}
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static int xrx200_tx_housekeeping(struct napi_struct *napi, int budget)
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{
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struct xrx200_chan *ch = container_of(napi,
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struct xrx200_chan, napi);
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struct net_device *net_dev = ch->priv->net_dev;
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int pkts = 0;
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int bytes = 0;
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netif_tx_lock(net_dev);
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while (pkts < budget) {
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struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->tx_free];
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if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
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struct sk_buff *skb = ch->skb[ch->tx_free];
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pkts++;
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bytes += skb->len;
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ch->skb[ch->tx_free] = NULL;
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consume_skb(skb);
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memset(&ch->dma.desc_base[ch->tx_free], 0,
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sizeof(struct ltq_dma_desc));
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ch->tx_free++;
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ch->tx_free %= LTQ_DESC_NUM;
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} else {
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break;
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}
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}
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net_dev->stats.tx_packets += pkts;
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net_dev->stats.tx_bytes += bytes;
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netdev_completed_queue(ch->priv->net_dev, pkts, bytes);
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netif_tx_unlock(net_dev);
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if (netif_queue_stopped(net_dev))
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netif_wake_queue(net_dev);
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if (pkts < budget) {
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if (napi_complete_done(&ch->napi, pkts))
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ltq_dma_enable_irq(&ch->dma);
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}
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return pkts;
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}
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static netdev_tx_t xrx200_start_xmit(struct sk_buff *skb,
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struct net_device *net_dev)
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{
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struct xrx200_priv *priv = netdev_priv(net_dev);
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struct xrx200_chan *ch = &priv->chan_tx;
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struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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u32 byte_offset;
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dma_addr_t mapping;
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int len;
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skb->dev = net_dev;
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if (skb_put_padto(skb, ETH_ZLEN)) {
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net_dev->stats.tx_dropped++;
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return NETDEV_TX_OK;
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}
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len = skb->len;
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if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
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netdev_err(net_dev, "tx ring full\n");
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netif_stop_queue(net_dev);
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return NETDEV_TX_BUSY;
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}
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ch->skb[ch->dma.desc] = skb;
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mapping = dma_map_single(priv->dev, skb->data, len, DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(priv->dev, mapping)))
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goto err_drop;
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/* dma needs to start on a 16 byte aligned address */
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byte_offset = mapping % 16;
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desc->addr = mapping - byte_offset;
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/* Make sure the address is written before we give it to HW */
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wmb();
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desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP |
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LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
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ch->dma.desc++;
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ch->dma.desc %= LTQ_DESC_NUM;
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if (ch->dma.desc == ch->tx_free)
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netif_stop_queue(net_dev);
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netdev_sent_queue(net_dev, len);
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return NETDEV_TX_OK;
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err_drop:
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dev_kfree_skb(skb);
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net_dev->stats.tx_dropped++;
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net_dev->stats.tx_errors++;
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return NETDEV_TX_OK;
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}
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static const struct net_device_ops xrx200_netdev_ops = {
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.ndo_open = xrx200_open,
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.ndo_stop = xrx200_close,
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.ndo_start_xmit = xrx200_start_xmit,
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.ndo_set_mac_address = eth_mac_addr,
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.ndo_validate_addr = eth_validate_addr,
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};
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static irqreturn_t xrx200_dma_irq(int irq, void *ptr)
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{
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struct xrx200_chan *ch = ptr;
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if (napi_schedule_prep(&ch->napi)) {
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ltq_dma_disable_irq(&ch->dma);
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__napi_schedule(&ch->napi);
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}
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ltq_dma_ack_irq(&ch->dma);
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return IRQ_HANDLED;
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}
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static int xrx200_dma_init(struct xrx200_priv *priv)
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{
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struct xrx200_chan *ch_rx = &priv->chan_rx;
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struct xrx200_chan *ch_tx = &priv->chan_tx;
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int ret = 0;
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int i;
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ltq_dma_init_port(DMA_PORT_ETOP);
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ch_rx->dma.nr = XRX200_DMA_RX;
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ch_rx->dma.dev = priv->dev;
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ch_rx->priv = priv;
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ltq_dma_alloc_rx(&ch_rx->dma);
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for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM;
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ch_rx->dma.desc++) {
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ret = xrx200_alloc_skb(ch_rx);
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if (ret)
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goto rx_free;
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}
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ch_rx->dma.desc = 0;
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ret = devm_request_irq(priv->dev, ch_rx->dma.irq, xrx200_dma_irq, 0,
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"xrx200_net_rx", &priv->chan_rx);
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if (ret) {
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dev_err(priv->dev, "failed to request RX irq %d\n",
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ch_rx->dma.irq);
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goto rx_ring_free;
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}
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ch_tx->dma.nr = XRX200_DMA_TX;
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ch_tx->dma.dev = priv->dev;
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ch_tx->priv = priv;
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ltq_dma_alloc_tx(&ch_tx->dma);
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ret = devm_request_irq(priv->dev, ch_tx->dma.irq, xrx200_dma_irq, 0,
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"xrx200_net_tx", &priv->chan_tx);
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if (ret) {
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dev_err(priv->dev, "failed to request TX irq %d\n",
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ch_tx->dma.irq);
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goto tx_free;
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}
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return ret;
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tx_free:
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ltq_dma_free(&ch_tx->dma);
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rx_ring_free:
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/* free the allocated RX ring */
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for (i = 0; i < LTQ_DESC_NUM; i++) {
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if (priv->chan_rx.skb[i])
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dev_kfree_skb_any(priv->chan_rx.skb[i]);
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}
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rx_free:
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ltq_dma_free(&ch_rx->dma);
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return ret;
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}
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static void xrx200_hw_cleanup(struct xrx200_priv *priv)
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{
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int i;
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ltq_dma_free(&priv->chan_tx.dma);
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ltq_dma_free(&priv->chan_rx.dma);
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/* free the allocated RX ring */
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for (i = 0; i < LTQ_DESC_NUM; i++)
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dev_kfree_skb_any(priv->chan_rx.skb[i]);
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}
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static int xrx200_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct xrx200_priv *priv;
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struct net_device *net_dev;
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int err;
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/* alloc the network device */
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net_dev = devm_alloc_etherdev(dev, sizeof(struct xrx200_priv));
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if (!net_dev)
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return -ENOMEM;
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priv = netdev_priv(net_dev);
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priv->net_dev = net_dev;
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priv->dev = dev;
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net_dev->netdev_ops = &xrx200_netdev_ops;
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SET_NETDEV_DEV(net_dev, dev);
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net_dev->min_mtu = ETH_ZLEN;
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net_dev->max_mtu = XRX200_DMA_DATA_LEN;
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/* load the memory ranges */
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priv->pmac_reg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
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if (IS_ERR(priv->pmac_reg))
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return PTR_ERR(priv->pmac_reg);
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priv->chan_rx.dma.irq = platform_get_irq_byname(pdev, "rx");
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if (priv->chan_rx.dma.irq < 0)
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return -ENOENT;
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priv->chan_tx.dma.irq = platform_get_irq_byname(pdev, "tx");
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if (priv->chan_tx.dma.irq < 0)
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return -ENOENT;
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/* get the clock */
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priv->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(priv->clk)) {
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dev_err(dev, "failed to get clock\n");
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return PTR_ERR(priv->clk);
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}
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err = of_get_mac_address(np, net_dev->dev_addr);
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if (err)
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eth_hw_addr_random(net_dev);
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/* bring up the dma engine and IP core */
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err = xrx200_dma_init(priv);
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if (err)
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return err;
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/* enable clock gate */
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err = clk_prepare_enable(priv->clk);
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if (err)
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goto err_uninit_dma;
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|
|
|
/* set IPG to 12 */
|
|
xrx200_pmac_mask(priv, PMAC_RX_IPG_MASK, 0xb, PMAC_RX_IPG);
|
|
|
|
/* enable status header, enable CRC */
|
|
xrx200_pmac_mask(priv, 0,
|
|
PMAC_HD_CTL_RST | PMAC_HD_CTL_AST | PMAC_HD_CTL_RXSH |
|
|
PMAC_HD_CTL_AS | PMAC_HD_CTL_AC | PMAC_HD_CTL_RC,
|
|
PMAC_HD_CTL);
|
|
|
|
/* setup NAPI */
|
|
netif_napi_add(net_dev, &priv->chan_rx.napi, xrx200_poll_rx, 32);
|
|
netif_tx_napi_add(net_dev, &priv->chan_tx.napi, xrx200_tx_housekeeping, 32);
|
|
|
|
platform_set_drvdata(pdev, priv);
|
|
|
|
err = register_netdev(net_dev);
|
|
if (err)
|
|
goto err_unprepare_clk;
|
|
|
|
return 0;
|
|
|
|
err_unprepare_clk:
|
|
clk_disable_unprepare(priv->clk);
|
|
|
|
err_uninit_dma:
|
|
xrx200_hw_cleanup(priv);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int xrx200_remove(struct platform_device *pdev)
|
|
{
|
|
struct xrx200_priv *priv = platform_get_drvdata(pdev);
|
|
struct net_device *net_dev = priv->net_dev;
|
|
|
|
/* free stack related instances */
|
|
netif_stop_queue(net_dev);
|
|
netif_napi_del(&priv->chan_tx.napi);
|
|
netif_napi_del(&priv->chan_rx.napi);
|
|
|
|
/* remove the actual device */
|
|
unregister_netdev(net_dev);
|
|
|
|
/* release the clock */
|
|
clk_disable_unprepare(priv->clk);
|
|
|
|
/* shut down hardware */
|
|
xrx200_hw_cleanup(priv);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id xrx200_match[] = {
|
|
{ .compatible = "lantiq,xrx200-net" },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, xrx200_match);
|
|
|
|
static struct platform_driver xrx200_driver = {
|
|
.probe = xrx200_probe,
|
|
.remove = xrx200_remove,
|
|
.driver = {
|
|
.name = "lantiq,xrx200-net",
|
|
.of_match_table = xrx200_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(xrx200_driver);
|
|
|
|
MODULE_AUTHOR("John Crispin <john@phrozen.org>");
|
|
MODULE_DESCRIPTION("Lantiq SoC XRX200 ethernet");
|
|
MODULE_LICENSE("GPL");
|