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![Uwe Kleine-König](/assets/img/avatar_default.png)
.get_state() might fail in some cases. To make it possible that a driver signals such a failure change the prototype of .get_state() to return an error code. This patch was created using coccinelle and the following semantic patch: @p1@ identifier getstatefunc; identifier driver; @@ struct pwm_ops driver = { ..., .get_state = getstatefunc ,... }; @p2@ identifier p1.getstatefunc; identifier chip, pwm, state; @@ -void +int getstatefunc(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { ... - return; + return 0; ... } plus the actual change of the prototype in include/linux/pwm.h (plus some manual fixing of indentions and empty lines). So for now all drivers return success unconditionally. They are adapted in the following patches to make the changes easier reviewable. Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com> Reviewed-by: Tzung-Bi Shih <tzungbi@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Acked-by: Douglas Anderson <dianders@chromium.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221130152148.2769768-2-u.kleine-koenig@pengutronix.de Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
347 lines
9 KiB
C
347 lines
9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2017-2018 SiFive
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* For SiFive's PWM IP block documentation please refer Chapter 14 of
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* Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf
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*
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* Limitations:
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* - When changing both duty cycle and period, we cannot prevent in
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* software that the output might produce a period with mixed
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* settings (new period length and old duty cycle).
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* - The hardware cannot generate a 100% duty cycle.
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* - The hardware generates only inverted output.
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*/
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/slab.h>
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#include <linux/bitfield.h>
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/* Register offsets */
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#define PWM_SIFIVE_PWMCFG 0x0
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#define PWM_SIFIVE_PWMCOUNT 0x8
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#define PWM_SIFIVE_PWMS 0x10
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#define PWM_SIFIVE_PWMCMP(i) (0x20 + 4 * (i))
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/* PWMCFG fields */
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#define PWM_SIFIVE_PWMCFG_SCALE GENMASK(3, 0)
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#define PWM_SIFIVE_PWMCFG_STICKY BIT(8)
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#define PWM_SIFIVE_PWMCFG_ZERO_CMP BIT(9)
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#define PWM_SIFIVE_PWMCFG_DEGLITCH BIT(10)
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#define PWM_SIFIVE_PWMCFG_EN_ALWAYS BIT(12)
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#define PWM_SIFIVE_PWMCFG_EN_ONCE BIT(13)
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#define PWM_SIFIVE_PWMCFG_CENTER BIT(16)
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#define PWM_SIFIVE_PWMCFG_GANG BIT(24)
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#define PWM_SIFIVE_PWMCFG_IP BIT(28)
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#define PWM_SIFIVE_CMPWIDTH 16
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#define PWM_SIFIVE_DEFAULT_PERIOD 10000000
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struct pwm_sifive_ddata {
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struct pwm_chip chip;
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struct mutex lock; /* lock to protect user_count and approx_period */
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struct notifier_block notifier;
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struct clk *clk;
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void __iomem *regs;
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unsigned int real_period;
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unsigned int approx_period;
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int user_count;
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};
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static inline
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struct pwm_sifive_ddata *pwm_sifive_chip_to_ddata(struct pwm_chip *c)
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{
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return container_of(c, struct pwm_sifive_ddata, chip);
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}
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static int pwm_sifive_request(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_sifive_ddata *ddata = pwm_sifive_chip_to_ddata(chip);
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mutex_lock(&ddata->lock);
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ddata->user_count++;
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mutex_unlock(&ddata->lock);
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return 0;
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}
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static void pwm_sifive_free(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct pwm_sifive_ddata *ddata = pwm_sifive_chip_to_ddata(chip);
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mutex_lock(&ddata->lock);
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ddata->user_count--;
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mutex_unlock(&ddata->lock);
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}
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/* Called holding ddata->lock */
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static void pwm_sifive_update_clock(struct pwm_sifive_ddata *ddata,
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unsigned long rate)
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{
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unsigned long long num;
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unsigned long scale_pow;
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int scale;
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u32 val;
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/*
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* The PWM unit is used with pwmzerocmp=0, so the only way to modify the
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* period length is using pwmscale which provides the number of bits the
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* counter is shifted before being feed to the comparators. A period
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* lasts (1 << (PWM_SIFIVE_CMPWIDTH + pwmscale)) clock ticks.
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* (1 << (PWM_SIFIVE_CMPWIDTH + scale)) * 10^9/rate = period
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*/
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scale_pow = div64_ul(ddata->approx_period * (u64)rate, NSEC_PER_SEC);
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scale = clamp(ilog2(scale_pow) - PWM_SIFIVE_CMPWIDTH, 0, 0xf);
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val = PWM_SIFIVE_PWMCFG_EN_ALWAYS |
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FIELD_PREP(PWM_SIFIVE_PWMCFG_SCALE, scale);
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writel(val, ddata->regs + PWM_SIFIVE_PWMCFG);
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/* As scale <= 15 the shift operation cannot overflow. */
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num = (unsigned long long)NSEC_PER_SEC << (PWM_SIFIVE_CMPWIDTH + scale);
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ddata->real_period = div64_ul(num, rate);
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dev_dbg(ddata->chip.dev,
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"New real_period = %u ns\n", ddata->real_period);
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}
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static int pwm_sifive_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
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struct pwm_state *state)
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{
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struct pwm_sifive_ddata *ddata = pwm_sifive_chip_to_ddata(chip);
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u32 duty, val;
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duty = readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm));
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state->enabled = duty > 0;
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val = readl(ddata->regs + PWM_SIFIVE_PWMCFG);
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if (!(val & PWM_SIFIVE_PWMCFG_EN_ALWAYS))
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state->enabled = false;
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state->period = ddata->real_period;
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state->duty_cycle =
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(u64)duty * ddata->real_period >> PWM_SIFIVE_CMPWIDTH;
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state->polarity = PWM_POLARITY_INVERSED;
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return 0;
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}
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static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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const struct pwm_state *state)
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{
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struct pwm_sifive_ddata *ddata = pwm_sifive_chip_to_ddata(chip);
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struct pwm_state cur_state;
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unsigned int duty_cycle;
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unsigned long long num;
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bool enabled;
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int ret = 0;
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u32 frac;
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if (state->polarity != PWM_POLARITY_INVERSED)
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return -EINVAL;
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cur_state = pwm->state;
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enabled = cur_state.enabled;
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duty_cycle = state->duty_cycle;
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if (!state->enabled)
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duty_cycle = 0;
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/*
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* The problem of output producing mixed setting as mentioned at top,
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* occurs here. To minimize the window for this problem, we are
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* calculating the register values first and then writing them
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* consecutively
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*/
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num = (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH);
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frac = DIV64_U64_ROUND_CLOSEST(num, state->period);
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/* The hardware cannot generate a 100% duty cycle */
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frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1);
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mutex_lock(&ddata->lock);
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if (state->period != ddata->approx_period) {
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if (ddata->user_count != 1) {
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mutex_unlock(&ddata->lock);
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return -EBUSY;
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}
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ddata->approx_period = state->period;
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pwm_sifive_update_clock(ddata, clk_get_rate(ddata->clk));
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}
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mutex_unlock(&ddata->lock);
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/*
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* If the PWM is enabled the clk is already on. So only enable it
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* conditionally to have it on exactly once afterwards independent of
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* the PWM state.
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*/
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if (!enabled) {
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ret = clk_enable(ddata->clk);
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if (ret) {
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dev_err(ddata->chip.dev, "Enable clk failed\n");
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return ret;
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}
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}
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writel(frac, ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm));
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if (!state->enabled)
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clk_disable(ddata->clk);
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return 0;
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}
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static const struct pwm_ops pwm_sifive_ops = {
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.request = pwm_sifive_request,
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.free = pwm_sifive_free,
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.get_state = pwm_sifive_get_state,
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.apply = pwm_sifive_apply,
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.owner = THIS_MODULE,
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};
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static int pwm_sifive_clock_notifier(struct notifier_block *nb,
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unsigned long event, void *data)
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{
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struct clk_notifier_data *ndata = data;
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struct pwm_sifive_ddata *ddata =
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container_of(nb, struct pwm_sifive_ddata, notifier);
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if (event == POST_RATE_CHANGE) {
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mutex_lock(&ddata->lock);
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pwm_sifive_update_clock(ddata, ndata->new_rate);
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mutex_unlock(&ddata->lock);
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}
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return NOTIFY_OK;
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}
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static int pwm_sifive_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct pwm_sifive_ddata *ddata;
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struct pwm_chip *chip;
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int ret;
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u32 val;
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unsigned int enabled_pwms = 0, enabled_clks = 1;
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ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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mutex_init(&ddata->lock);
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chip = &ddata->chip;
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chip->dev = dev;
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chip->ops = &pwm_sifive_ops;
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chip->npwm = 4;
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ddata->regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(ddata->regs))
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return PTR_ERR(ddata->regs);
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ddata->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(ddata->clk))
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return dev_err_probe(dev, PTR_ERR(ddata->clk),
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"Unable to find controller clock\n");
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ret = clk_prepare_enable(ddata->clk);
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if (ret) {
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dev_err(dev, "failed to enable clock for pwm: %d\n", ret);
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return ret;
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}
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val = readl(ddata->regs + PWM_SIFIVE_PWMCFG);
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if (val & PWM_SIFIVE_PWMCFG_EN_ALWAYS) {
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unsigned int i;
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for (i = 0; i < chip->npwm; ++i) {
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val = readl(ddata->regs + PWM_SIFIVE_PWMCMP(i));
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if (val > 0)
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++enabled_pwms;
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}
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}
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/* The clk should be on once for each running PWM. */
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if (enabled_pwms) {
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while (enabled_clks < enabled_pwms) {
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/* This is not expected to fail as the clk is already on */
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ret = clk_enable(ddata->clk);
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if (unlikely(ret)) {
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dev_err_probe(dev, ret, "Failed to enable clk\n");
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goto disable_clk;
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}
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++enabled_clks;
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}
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} else {
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clk_disable(ddata->clk);
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enabled_clks = 0;
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}
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/* Watch for changes to underlying clock frequency */
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ddata->notifier.notifier_call = pwm_sifive_clock_notifier;
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ret = clk_notifier_register(ddata->clk, &ddata->notifier);
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if (ret) {
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dev_err(dev, "failed to register clock notifier: %d\n", ret);
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goto disable_clk;
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}
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ret = pwmchip_add(chip);
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if (ret < 0) {
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dev_err(dev, "cannot register PWM: %d\n", ret);
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goto unregister_clk;
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}
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platform_set_drvdata(pdev, ddata);
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dev_dbg(dev, "SiFive PWM chip registered %d PWMs\n", chip->npwm);
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return 0;
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unregister_clk:
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clk_notifier_unregister(ddata->clk, &ddata->notifier);
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disable_clk:
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while (enabled_clks) {
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clk_disable(ddata->clk);
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--enabled_clks;
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}
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clk_unprepare(ddata->clk);
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return ret;
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}
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static int pwm_sifive_remove(struct platform_device *dev)
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{
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struct pwm_sifive_ddata *ddata = platform_get_drvdata(dev);
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struct pwm_device *pwm;
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int ch;
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pwmchip_remove(&ddata->chip);
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clk_notifier_unregister(ddata->clk, &ddata->notifier);
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for (ch = 0; ch < ddata->chip.npwm; ch++) {
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pwm = &ddata->chip.pwms[ch];
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if (pwm->state.enabled)
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clk_disable(ddata->clk);
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}
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clk_unprepare(ddata->clk);
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return 0;
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}
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static const struct of_device_id pwm_sifive_of_match[] = {
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{ .compatible = "sifive,pwm0" },
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{},
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};
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MODULE_DEVICE_TABLE(of, pwm_sifive_of_match);
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static struct platform_driver pwm_sifive_driver = {
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.probe = pwm_sifive_probe,
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.remove = pwm_sifive_remove,
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.driver = {
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.name = "pwm-sifive",
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.of_match_table = pwm_sifive_of_match,
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},
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};
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module_platform_driver(pwm_sifive_driver);
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MODULE_DESCRIPTION("SiFive PWM driver");
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MODULE_LICENSE("GPL v2");
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