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c0cd3b1790
Aside with a set of the trigger-like resets Baikal-T1 CCU provides additional directly controlled reset signals for the DDR and PCIe controllers. As a preparation before adding these resets support to the kernel let's extent the Baikal-T1 CCU IDs list with the new IDs, which will be used to access the corresponding reset controls. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220929225402.9696-7-Sergey.Semin@baikalelectronics.ru Signed-off-by: Stephen Boyd <sboyd@kernel.org>
34 lines
930 B
C
34 lines
930 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2020 BAIKAL ELECTRONICS, JSC
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*
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* Baikal-T1 CCU reset indices
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*/
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#ifndef __DT_BINDINGS_RESET_BT1_CCU_H
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#define __DT_BINDINGS_RESET_BT1_CCU_H
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#define CCU_AXI_MAIN_RST 0
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#define CCU_AXI_DDR_RST 1
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#define CCU_AXI_SATA_RST 2
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#define CCU_AXI_GMAC0_RST 3
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#define CCU_AXI_GMAC1_RST 4
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#define CCU_AXI_XGMAC_RST 5
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#define CCU_AXI_PCIE_M_RST 6
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#define CCU_AXI_PCIE_S_RST 7
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#define CCU_AXI_USB_RST 8
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#define CCU_AXI_HWA_RST 9
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#define CCU_AXI_SRAM_RST 10
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#define CCU_SYS_SATA_REF_RST 0
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#define CCU_SYS_APB_RST 1
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#define CCU_SYS_DDR_FULL_RST 2
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#define CCU_SYS_DDR_INIT_RST 3
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#define CCU_SYS_PCIE_PCS_PHY_RST 4
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#define CCU_SYS_PCIE_PIPE0_RST 5
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#define CCU_SYS_PCIE_CORE_RST 6
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#define CCU_SYS_PCIE_PWR_RST 7
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#define CCU_SYS_PCIE_STICKY_RST 8
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#define CCU_SYS_PCIE_NSTICKY_RST 9
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#define CCU_SYS_PCIE_HOT_RST 10
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#endif /* __DT_BINDINGS_RESET_BT1_CCU_H */
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