Pawan Gupta ee32a74416 x86/tsx: Disable TSX development mode at boot ... commit 400331f8ff upstream. A microcode update on some Intel processors causes all TSX transactions to always abort by default[*]. Microcode also added functionality to re-enable TSX for development purposes. With this microcode loaded, if tsx=on was passed on the cmdline, and TSX development mode was already enabled before the kernel boot, it may make the system vulnerable to TSX Asynchronous Abort (TAA). To be on safer side, unconditionally disable TSX development mode during boot. If a viable use case appears, this can be revisited later. [*]: Intel TSX Disable Update for Selected Processors, doc ID: 643557 [ bp: Drop unstable web link, massage heavily. ] Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com> Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Tested-by: Neelima Krishnan <neelima.krishnan@intel.com> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/347bd844da3a333a9793c6687d4e4eb3b2419a3e.1646943780.git.pawan.kumar.gupta@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2022-04-20 09:36:26 +02:00
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alpha/include
arc/include/uapi/asm
arm/include
arm64/include	tools kvm headers arm64: Update KVM headers from the kernel sources	2022-03-12 10:33:13 -03:00
csky/include/uapi/asm
h8300/include
hexagon/include/uapi/asm
ia64/include	ia64: tools: remove duplicate definition of ia64_mf() on ia64	2021-04-16 16:10:37 -07:00
microblaze/include/uapi/asm
mips/include	perf tools: Copy uapi/asm/perf_regs.h from the kernel for MIPS	2021-06-01 10:07:46 -03:00
parisc/include/uapi/asm
powerpc/include	perf powerpc: Add support to expose instruction and data address registers as part of extended regs	2021-10-25 13:47:42 -03:00
riscv/include/uapi/asm
s390/include
sh/include
sparc/include
x86	x86/tsx: Disable TSX development mode at boot	2022-04-20 09:36:26 +02:00
xtensa/include