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fd9abe1b5b
addruart cannot read from the physical address of the chipid register, that will fail as soon as the mmu is turned on. Fixing it to read from the physical or virtual address depending on the mmu state also does not work, because there is a period between head.S and exynos_map_io where the mmu is on, the uart is mapped and used, but the chipid mapping is not yet present. Fix addruart to use the ARM Main ID cp15 register to determine if the core is Cortex A15 (EXYNOS5) or not (EXYNOS4). Signed-off-by: Colin Cross <ccross@android.com> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Tested-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
39 lines
1.2 KiB
ArmAsm
39 lines
1.2 KiB
ArmAsm
/* linux/arch/arm/mach-exynos4/include/mach/debug-macro.S
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* pull in the relevant register and map files. */
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#include <mach/map.h>
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/* note, for the boot process to work we have to keep the UART
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* virtual address aligned to an 1MiB boundary for the L1
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* mapping the head code makes. We keep the UART virtual address
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* aligned and add in the offset when we load the value here.
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*/
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.macro addruart, rp, rv, tmp
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mrc p15, 0, \tmp, c0, c0, 0
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and \tmp, \tmp, #0xf0
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teq \tmp, #0xf0 @@ A15
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ldreq \rp, =EXYNOS5_PA_UART
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movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
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ldr \rv, =S3C_VA_UART
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#if CONFIG_DEBUG_S3C_UART != 0
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add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
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add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
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#endif
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.endm
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#define fifo_full fifo_full_s5pv210
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#define fifo_level fifo_level_s5pv210
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#include <plat/debug-macro.S>
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