mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-07 09:09:23 +00:00
afcf7924ec
Merging in fixes since there's a conflict in the omap4 clock tables caused by it. * fixes: (245 commits) ARM: highbank: fix cache flush ordering for cpu hotplug ARM: OMAP4: hwmod data: make 'ocp2scp_usb_phy_phy_48m" as the main clock arm: mvebu: Fix the irq map function in SMP mode Fix GE0/GE1 init on ix2-200 as GE0 has no PHY ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller ARM: S3C24XX: Correct NR_IRQS definition for s3c2440 ARM i.MX6: Fix ldb_di clock selection ARM: imx: provide twd clock lookup from device tree ARM: imx35 Bugfix admux clock ARM: clk-imx35: Bugfix iomux clock + Linux 3.9-rc6 Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/mach-omap2/cclock44xx_data.c
155 lines
4.9 KiB
C
155 lines
4.9 KiB
C
/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_COMMON_H__
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#define __ASM_ARCH_MXC_COMMON_H__
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struct platform_device;
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struct clk;
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enum mxc_cpu_pwr_mode;
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extern void mx1_map_io(void);
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extern void mx21_map_io(void);
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extern void mx25_map_io(void);
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extern void mx27_map_io(void);
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extern void mx31_map_io(void);
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extern void mx35_map_io(void);
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extern void mx51_map_io(void);
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extern void mx53_map_io(void);
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extern void imx1_init_early(void);
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extern void imx21_init_early(void);
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extern void imx25_init_early(void);
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extern void imx27_init_early(void);
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extern void imx31_init_early(void);
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extern void imx35_init_early(void);
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extern void imx51_init_early(void);
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extern void imx53_init_early(void);
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extern void mxc_init_irq(void __iomem *);
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extern void tzic_init_irq(void __iomem *);
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extern void mx1_init_irq(void);
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extern void mx21_init_irq(void);
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extern void mx25_init_irq(void);
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extern void mx27_init_irq(void);
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extern void mx31_init_irq(void);
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extern void mx35_init_irq(void);
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extern void mx51_init_irq(void);
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extern void mx53_init_irq(void);
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extern void imx1_soc_init(void);
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extern void imx21_soc_init(void);
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extern void imx25_soc_init(void);
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extern void imx27_soc_init(void);
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extern void imx31_soc_init(void);
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extern void imx35_soc_init(void);
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extern void imx51_soc_init(void);
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extern void imx51_init_late(void);
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extern void imx53_init_late(void);
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extern void epit_timer_init(void __iomem *base, int irq);
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extern void mxc_timer_init(void __iomem *, int);
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extern int mx1_clocks_init(unsigned long fref);
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extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
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extern int mx25_clocks_init(void);
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extern int mx27_clocks_init(unsigned long fref);
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extern int mx31_clocks_init(unsigned long fref);
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extern int mx35_clocks_init(void);
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extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
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unsigned long ckih1, unsigned long ckih2);
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extern int mx25_clocks_init_dt(void);
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extern int mx27_clocks_init_dt(void);
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extern int mx31_clocks_init_dt(void);
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extern int mx51_clocks_init_dt(void);
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extern int mx53_clocks_init_dt(void);
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extern int mx6q_clocks_init(void);
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extern struct platform_device *mxc_register_gpio(char *name, int id,
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resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
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extern void mxc_set_cpu_type(unsigned int type);
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extern void mxc_restart(char, const char *);
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extern void mxc_arch_reset_init(void __iomem *);
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extern int mx53_revision(void);
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extern int mx53_display_revision(void);
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extern void imx_set_aips(void __iomem *);
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extern int mxc_device_init(void);
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enum mxc_cpu_pwr_mode {
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WAIT_CLOCKED, /* wfi only */
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WAIT_UNCLOCKED, /* WAIT */
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WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
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STOP_POWER_ON, /* just STOP */
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STOP_POWER_OFF, /* STOP + SRPG */
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};
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enum mx3_cpu_pwr_mode {
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MX3_RUN,
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MX3_WAIT,
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MX3_DOZE,
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MX3_SLEEP,
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};
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extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
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extern void imx_print_silicon_rev(const char *cpu, int srev);
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void avic_handle_irq(struct pt_regs *);
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void tzic_handle_irq(struct pt_regs *);
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#define imx1_handle_irq avic_handle_irq
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#define imx21_handle_irq avic_handle_irq
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#define imx25_handle_irq avic_handle_irq
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#define imx27_handle_irq avic_handle_irq
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#define imx31_handle_irq avic_handle_irq
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#define imx35_handle_irq avic_handle_irq
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#define imx51_handle_irq tzic_handle_irq
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#define imx53_handle_irq tzic_handle_irq
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extern void imx_enable_cpu(int cpu, bool enable);
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extern void imx_set_cpu_jump(int cpu, void *jump_addr);
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extern u32 imx_get_cpu_arg(int cpu);
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extern void imx_set_cpu_arg(int cpu, u32 arg);
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extern void v7_cpu_resume(void);
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#ifdef CONFIG_SMP
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extern void v7_secondary_startup(void);
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extern void imx_scu_map_io(void);
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extern void imx_smp_prepare(void);
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extern void imx_scu_standby_enable(void);
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#else
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static inline void imx_scu_map_io(void) {}
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static inline void imx_smp_prepare(void) {}
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static inline void imx_scu_standby_enable(void) {}
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#endif
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extern void imx_src_init(void);
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extern void imx_src_prepare_restart(void);
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extern void imx_gpc_init(void);
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extern void imx_gpc_pre_suspend(void);
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extern void imx_gpc_post_resume(void);
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extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
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extern void imx6q_set_chicken_bit(void);
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extern void imx_cpu_die(unsigned int cpu);
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extern int imx_cpu_kill(unsigned int cpu);
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#ifdef CONFIG_PM
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extern void imx6q_pm_init(void);
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extern void imx51_pm_init(void);
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extern void imx53_pm_init(void);
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#else
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static inline void imx6q_pm_init(void) {}
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static inline void imx51_pm_init(void) {}
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static inline void imx53_pm_init(void) {}
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#endif
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#ifdef CONFIG_NEON
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extern int mx51_neon_fixup(void);
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#else
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static inline int mx51_neon_fixup(void) { return 0; }
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#endif
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extern struct smp_operations imx_smp_ops;
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#endif
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