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cf3ee3c8c2
Now that all architectures provide arch_atomic_long_*(), we can implement the generic bitops atop these rather than atop atomic_long_*(), and provide arch_*() forms of the bitops that are safe to use in noinstr code. Now that all architectures provide arch_atomic_long_*(), we can build the generic arch_*() bitops atop these, which can be safely used in noinstr code. The regular bitop wrappers are built atop these. As the generic non-atomic bitops use plain accesses, these will be implicitly instrumented unless they are inlined into noinstr functions (which is similar to arch_atomic*_read() when based on READ_ONCE()). The wrappers are modified so that where the underlying arch_*() function uses a plain access, no explicit instrumentation is added, as this is redundant and could result in confusing reports. Since function prototypes get excessively long with both an `arch_` prefix and `__always_inline` attribute, the return type and function attributes have been split onto a separate line, matching the style of the generated atomic headers. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210713105253.7615-6-mark.rutland@arm.com
76 lines
1.7 KiB
C
76 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_GENERIC_BITOPS_ATOMIC_H_
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#define _ASM_GENERIC_BITOPS_ATOMIC_H_
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#include <linux/atomic.h>
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#include <linux/compiler.h>
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#include <asm/barrier.h>
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/*
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* Implementation of atomic bitops using atomic-fetch ops.
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* See Documentation/atomic_bitops.txt for details.
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*/
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static __always_inline void
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arch_set_bit(unsigned int nr, volatile unsigned long *p)
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{
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p += BIT_WORD(nr);
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arch_atomic_long_or(BIT_MASK(nr), (atomic_long_t *)p);
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}
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static __always_inline void
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arch_clear_bit(unsigned int nr, volatile unsigned long *p)
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{
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p += BIT_WORD(nr);
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arch_atomic_long_andnot(BIT_MASK(nr), (atomic_long_t *)p);
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}
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static __always_inline void
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arch_change_bit(unsigned int nr, volatile unsigned long *p)
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{
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p += BIT_WORD(nr);
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arch_atomic_long_xor(BIT_MASK(nr), (atomic_long_t *)p);
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}
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static __always_inline int
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arch_test_and_set_bit(unsigned int nr, volatile unsigned long *p)
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{
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long old;
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unsigned long mask = BIT_MASK(nr);
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p += BIT_WORD(nr);
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if (READ_ONCE(*p) & mask)
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return 1;
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old = arch_atomic_long_fetch_or(mask, (atomic_long_t *)p);
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return !!(old & mask);
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}
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static __always_inline int
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arch_test_and_clear_bit(unsigned int nr, volatile unsigned long *p)
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{
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long old;
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unsigned long mask = BIT_MASK(nr);
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p += BIT_WORD(nr);
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if (!(READ_ONCE(*p) & mask))
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return 0;
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old = arch_atomic_long_fetch_andnot(mask, (atomic_long_t *)p);
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return !!(old & mask);
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}
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static __always_inline int
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arch_test_and_change_bit(unsigned int nr, volatile unsigned long *p)
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{
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long old;
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unsigned long mask = BIT_MASK(nr);
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p += BIT_WORD(nr);
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old = arch_atomic_long_fetch_xor(mask, (atomic_long_t *)p);
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return !!(old & mask);
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}
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#include <asm-generic/bitops/instrumented-atomic.h>
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#endif /* _ASM_GENERIC_BITOPS_ATOMIC_H */
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