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![Ioana Ciornei](/assets/img/avatar_default.png)
Use the generic dynamic interrupt moderation (dim) framework to implement adaptive interrupt coalescing on Rx. With the per-packet interrupt scheme, a high interrupt rate has been noted for moderate traffic flows leading to high CPU utilization. The dpio driver exports new functions to enable/disable adaptive IRQ coalescing on a DPIO object, to query the state or to update Net DIM with a new set of bytes and frames dequeued. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
141 lines
4.7 KiB
C
141 lines
4.7 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright 2014-2016 Freescale Semiconductor Inc.
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* Copyright 2017-2019 NXP
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*
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*/
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#ifndef __FSL_DPAA2_IO_H
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#define __FSL_DPAA2_IO_H
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#include <linux/types.h>
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#include <linux/cpumask.h>
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#include <linux/irqreturn.h>
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#include "dpaa2-fd.h"
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#include "dpaa2-global.h"
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struct dpaa2_io;
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struct dpaa2_io_store;
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struct device;
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/**
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* DOC: DPIO Service
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*
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* The DPIO service provides APIs for users to interact with the datapath
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* by enqueueing and dequeing frame descriptors.
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*
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* The following set of APIs can be used to enqueue and dequeue frames
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* as well as producing notification callbacks when data is available
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* for dequeue.
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*/
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#define DPAA2_IO_ANY_CPU -1
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/**
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* struct dpaa2_io_desc - The DPIO descriptor
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* @receives_notifications: Use notificaton mode. Non-zero if the DPIO
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* has a channel.
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* @has_8prio: Set to non-zero for channel with 8 priority WQs. Ignored
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* unless receives_notification is TRUE.
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* @cpu: The cpu index that at least interrupt handlers will
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* execute on.
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* @stash_affinity: The stash affinity for this portal favour 'cpu'
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* @regs_cena: The cache enabled regs.
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* @regs_cinh: The cache inhibited regs
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* @dpio_id: The dpio index
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* @qman_version: The qman version
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* @qman_clk: The qman clock frequency in Hz
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*
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* Describes the attributes and features of the DPIO object.
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*/
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struct dpaa2_io_desc {
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int receives_notifications;
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int has_8prio;
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int cpu;
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void *regs_cena;
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void __iomem *regs_cinh;
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int dpio_id;
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u32 qman_version;
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u32 qman_clk;
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};
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struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc,
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struct device *dev);
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void dpaa2_io_down(struct dpaa2_io *d);
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irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj);
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struct dpaa2_io *dpaa2_io_service_select(int cpu);
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/**
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* struct dpaa2_io_notification_ctx - The DPIO notification context structure
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* @cb: The callback to be invoked when the notification arrives
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* @is_cdan: Zero for FQDAN, non-zero for CDAN
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* @id: FQID or channel ID, needed for rearm
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* @desired_cpu: The cpu on which the notifications will show up. Use
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* DPAA2_IO_ANY_CPU if don't care
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* @dpio_id: The dpio index
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* @qman64: The 64-bit context value shows up in the FQDAN/CDAN.
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* @node: The list node
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* @dpio_private: The dpio object internal to dpio_service
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*
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* Used when a FQDAN/CDAN registration is made by drivers.
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*/
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struct dpaa2_io_notification_ctx {
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void (*cb)(struct dpaa2_io_notification_ctx *ctx);
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int is_cdan;
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u32 id;
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int desired_cpu;
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int dpio_id;
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u64 qman64;
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struct list_head node;
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void *dpio_private;
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};
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int dpaa2_io_get_cpu(struct dpaa2_io *d);
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int dpaa2_io_service_register(struct dpaa2_io *service,
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struct dpaa2_io_notification_ctx *ctx,
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struct device *dev);
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void dpaa2_io_service_deregister(struct dpaa2_io *service,
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struct dpaa2_io_notification_ctx *ctx,
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struct device *dev);
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int dpaa2_io_service_rearm(struct dpaa2_io *service,
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struct dpaa2_io_notification_ctx *ctx);
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int dpaa2_io_service_pull_fq(struct dpaa2_io *d, u32 fqid,
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struct dpaa2_io_store *s);
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int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid,
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struct dpaa2_io_store *s);
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int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d, u32 fqid,
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const struct dpaa2_fd *fd);
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int dpaa2_io_service_enqueue_multiple_fq(struct dpaa2_io *d, u32 fqid,
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const struct dpaa2_fd *fd, int number_of_frame);
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int dpaa2_io_service_enqueue_multiple_desc_fq(struct dpaa2_io *d, u32 *fqid,
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const struct dpaa2_fd *fd, int number_of_frame);
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int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio,
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u16 qdbin, const struct dpaa2_fd *fd);
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int dpaa2_io_service_release(struct dpaa2_io *d, u16 bpid,
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const u64 *buffers, unsigned int num_buffers);
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int dpaa2_io_service_acquire(struct dpaa2_io *d, u16 bpid,
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u64 *buffers, unsigned int num_buffers);
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struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames,
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struct device *dev);
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void dpaa2_io_store_destroy(struct dpaa2_io_store *s);
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struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last);
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int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid,
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u32 *fcnt, u32 *bcnt);
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int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid,
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u32 *num);
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int dpaa2_io_set_irq_coalescing(struct dpaa2_io *d, u32 irq_holdoff);
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void dpaa2_io_get_irq_coalescing(struct dpaa2_io *d, u32 *irq_holdoff);
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void dpaa2_io_set_adaptive_coalescing(struct dpaa2_io *d,
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int use_adaptive_rx_coalesce);
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int dpaa2_io_get_adaptive_coalescing(struct dpaa2_io *d);
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void dpaa2_io_update_net_dim(struct dpaa2_io *d, __u64 frames, __u64 bytes);
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#endif /* __FSL_DPAA2_IO_H */
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