mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-29 23:53:32 +00:00
177cf6e52b
All the clocksource drivers's init function are now converted to return an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the clksrc-of table. Let's convert back the names: - CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE - clksrc-of-ret => clksrc-of Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> For exynos_mct and samsung_pwm_timer: Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> For arch/arc: Acked-by: Vineet Gupta <vgupta@synopsys.com> For mediatek driver: Acked-by: Matthias Brugger <matthias.bgg@gmail.com> For the Rockchip-part Acked-by: Heiko Stuebner <heiko@sntech.de> For STi : Acked-by: Patrice Chotard <patrice.chotard@st.com> For the mps2-timer.c and versatile.c changes: Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> For the OXNAS part : Acked-by: Neil Armstrong <narmstrong@baylibre.com> For LPC32xx driver: Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> For Broadcom Kona timer change: Acked-by: Ray Jui <ray.jui@broadcom.com> For Sun4i and Sun5i: Acked-by: Chen-Yu Tsai <wens@csie.org> For Meson6: Acked-by: Carlo Caione <carlo@caione.org> For Keystone: Acked-by: Santosh Shilimkar <ssantosh@kernel.org> For NPS: Acked-by: Noam Camus <noamca@mellanox.com> For bcm2835: Acked-by: Eric Anholt <eric@anholt.net>
100 lines
3 KiB
C
100 lines
3 KiB
C
/*
|
|
* Copyright (c) 2016, Mellanox Technologies. All rights reserved.
|
|
*
|
|
* This software is available to you under a choice of one of two
|
|
* licenses. You may choose to be licensed under the terms of the GNU
|
|
* General Public License (GPL) Version 2, available from the file
|
|
* COPYING in the main directory of this source tree, or the
|
|
* OpenIB.org BSD license below:
|
|
*
|
|
* Redistribution and use in source and binary forms, with or
|
|
* without modification, are permitted provided that the following
|
|
* conditions are met:
|
|
*
|
|
* - Redistributions of source code must retain the above
|
|
* copyright notice, this list of conditions and the following
|
|
* disclaimer.
|
|
*
|
|
* - Redistributions in binary form must reproduce the above
|
|
* copyright notice, this list of conditions and the following
|
|
* disclaimer in the documentation and/or other materials
|
|
* provided with the distribution.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
|
|
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
|
|
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
|
* SOFTWARE.
|
|
*/
|
|
|
|
#include <linux/interrupt.h>
|
|
#include <linux/clocksource.h>
|
|
#include <linux/clockchips.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/of.h>
|
|
#include <linux/of_irq.h>
|
|
#include <linux/cpu.h>
|
|
#include <soc/nps/common.h>
|
|
|
|
#define NPS_MSU_TICK_LOW 0xC8
|
|
#define NPS_CLUSTER_OFFSET 8
|
|
#define NPS_CLUSTER_NUM 16
|
|
|
|
/* This array is per cluster of CPUs (Each NPS400 cluster got 256 CPUs) */
|
|
static void *nps_msu_reg_low_addr[NPS_CLUSTER_NUM] __read_mostly;
|
|
|
|
static unsigned long nps_timer_rate;
|
|
|
|
static cycle_t nps_clksrc_read(struct clocksource *clksrc)
|
|
{
|
|
int cluster = raw_smp_processor_id() >> NPS_CLUSTER_OFFSET;
|
|
|
|
return (cycle_t)ioread32be(nps_msu_reg_low_addr[cluster]);
|
|
}
|
|
|
|
static int __init nps_setup_clocksource(struct device_node *node,
|
|
struct clk *clk)
|
|
{
|
|
int ret, cluster;
|
|
|
|
for (cluster = 0; cluster < NPS_CLUSTER_NUM; cluster++)
|
|
nps_msu_reg_low_addr[cluster] =
|
|
nps_host_reg((cluster << NPS_CLUSTER_OFFSET),
|
|
NPS_MSU_BLKID, NPS_MSU_TICK_LOW);
|
|
|
|
ret = clk_prepare_enable(clk);
|
|
if (ret) {
|
|
pr_err("Couldn't enable parent clock\n");
|
|
return ret;
|
|
}
|
|
|
|
nps_timer_rate = clk_get_rate(clk);
|
|
|
|
ret = clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick",
|
|
nps_timer_rate, 301, 32, nps_clksrc_read);
|
|
if (ret) {
|
|
pr_err("Couldn't register clock source.\n");
|
|
clk_disable_unprepare(clk);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __init nps_timer_init(struct device_node *node)
|
|
{
|
|
struct clk *clk;
|
|
|
|
clk = of_clk_get(node, 0);
|
|
if (IS_ERR(clk)) {
|
|
pr_err("Can't get timer clock.\n");
|
|
return PTR_ERR(clk);
|
|
}
|
|
|
|
return nps_setup_clocksource(node, clk);
|
|
}
|
|
|
|
CLOCKSOURCE_OF_DECLARE(ezchip_nps400_clksrc, "ezchip,nps400-timer",
|
|
nps_timer_init);
|