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![Suzuki K Poulose](/assets/img/avatar_default.png)
When the kernel is running at EL2, the PID is stored in CONTEXTIDR_EL2. So, tracing CONTEXTIDR_EL1 doesn't give us the pid of the process. Thus we should trace the VMID with VMIDOPT set to trace CONTEXTIDR_EL2 instead of CONTEXTIDR_EL1. Given that we have an existing config option "contextid" and this will be useful for tracing virtual machines (when we get to support virtualization). So instead, this patch extends option CTXTID with an extra bit ETM_OPT_CTXTID2 (bit 15), thus on an EL2 kernel, we will have another bit available for the perf tool: ETM_OPT_CTXTID is for kernel running in EL1, ETM_OPT_CTXTID2 is used when kernel runs in EL2 with VHE enabled. The tool must be backward compatible for users, i.e, "contextid" today traces PID and that should remain the same; for this purpose, the perf tool is updated to automatically set corresponding bit for the "contextid" config, therefore, the user doesn't have to bother which EL the kernel is running. i.e, perf record -e cs_etm/contextid/u -- will always do the "pid" tracing, independent of the kernel EL. The driver parses the format "contextid", which traces CONTEXTIDR_EL1 for ETM_OPT_CTXTID (on EL1 kernel) and traces CONTEXTIDR_EL2 for ETM_OPT_CTXTID2 (on EL2 kernel). Besides the enhancement for format "contexid", extra two formats are introduced: "contextid1" and "contextid2". This considers to support tracing both CONTEXTIDR_EL1 and CONTEXTIDR_EL2 when the kernel is running at EL2. Finally, the PMU formats are defined as follow: "contextid1": Available on both EL1 kernel and EL2 kernel. When the kernel is running at EL1, "contextid1" enables the PID tracing; when the kernel is running at EL2, this enables tracing the PID of guest applications. "contextid2": Only usable when the kernel is running at EL2. When selected, enables PID tracing on EL2 kernel. "contextid": Will be an alias for the option that enables PID tracing. I.e, contextid == contextid1, on EL1 kernel. contextid == contextid2, on EL2 kernel. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Al Grant <al.grant@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [ Added two config formats: contextid1, contextid2 ] Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Link: https://lore.kernel.org/r/20210206150833.42120-4-leo.yan@linaro.org Link: https://lore.kernel.org/r/20210211172038.2483517-3-mathieu.poirier@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright(C) 2015 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*/
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#ifndef _LINUX_CORESIGHT_PMU_H
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#define _LINUX_CORESIGHT_PMU_H
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#define CORESIGHT_ETM_PMU_NAME "cs_etm"
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#define CORESIGHT_ETM_PMU_SEED 0x10
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/*
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* Below are the definition of bit offsets for perf option, and works as
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* arbitrary values for all ETM versions.
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*
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* Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
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* ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
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* directly use below macros as config bits.
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*/
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#define ETM_OPT_CYCACC 12
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#define ETM_OPT_CTXTID 14
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#define ETM_OPT_CTXTID2 15
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#define ETM_OPT_TS 28
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#define ETM_OPT_RETSTK 29
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/* ETMv4 CONFIGR programming bits for the ETM OPTs */
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#define ETM4_CFG_BIT_CYCACC 4
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#define ETM4_CFG_BIT_CTXTID 6
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#define ETM4_CFG_BIT_VMID 7
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#define ETM4_CFG_BIT_TS 11
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#define ETM4_CFG_BIT_RETSTK 12
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#define ETM4_CFG_BIT_VMID_OPT 15
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static inline int coresight_get_trace_id(int cpu)
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{
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/*
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* A trace ID of value 0 is invalid, so let's start at some
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* random value that fits in 7 bits and go from there. Since
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* the common convention is to have data trace IDs be I(N) + 1,
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* set instruction trace IDs as a function of the CPU number.
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*/
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return (CORESIGHT_ETM_PMU_SEED + (cpu * 2));
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}
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#endif
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