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b1992c3772
Kbuild conventionally uses $(obj)/ for generated files, and $(src)/ for
checked-in source files. It is merely a convention without any functional
difference. In fact, $(obj) and $(src) are exactly the same, as defined
in scripts/Makefile.build:
src := $(obj)
When the kernel is built in a separate output directory, $(src) does
not accurately reflect the source directory location. While Kbuild
resolves this discrepancy by specifying VPATH=$(srctree) to search for
source files, it does not cover all cases. For example, when adding a
header search path for local headers, -I$(srctree)/$(src) is typically
passed to the compiler.
This introduces inconsistency between upstream and downstream Makefiles
because $(src) is used instead of $(srctree)/$(src) for the latter.
To address this inconsistency, this commit changes the semantics of
$(src) so that it always points to the directory in the source tree.
Going forward, the variables used in Makefiles will have the following
meanings:
$(obj) - directory in the object tree
$(src) - directory in the source tree (changed by this commit)
$(objtree) - the top of the kernel object tree
$(srctree) - the top of the kernel source tree
Consequently, $(srctree)/$(src) in upstream Makefiles need to be replaced
with $(src).
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Nicolas Schier <nicolas@fjasle.eu>
155 lines
4.7 KiB
Makefile
155 lines
4.7 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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# ===========================================================================
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# Module versions
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# ===========================================================================
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#
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# Stage one of module building created the following:
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# a) The individual .o files used for the module
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# b) A <module>.o file which is the .o files above linked together
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# c) A <module>.mod file, listing the name of the preliminary <module>.o file,
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# plus all .o files
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# d) modules.order, which lists all the modules
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# Stage 2 is handled by this file and does the following
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# 1) Find all modules listed in modules.order
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# 2) modpost is then used to
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# 3) create one <module>.mod.c file per module
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# 4) create one Module.symvers file with CRC for all exported symbols
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# Step 3 is used to place certain information in the module's ELF
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# section, including information such as:
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# Version magic (see include/linux/vermagic.h for full details)
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# - Kernel release
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# - SMP is CONFIG_SMP
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# - PREEMPT is CONFIG_PREEMPT[_RT]
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# - GCC Version
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# Module info
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# - Module version (MODULE_VERSION)
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# - Module alias'es (MODULE_ALIAS)
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# - Module license (MODULE_LICENSE)
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# - See include/linux/module.h for more details
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# Step 4 is solely used to allow module versioning in external modules,
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# where the CRC of each module is retrieved from the Module.symvers file.
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PHONY := __modpost
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__modpost:
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include include/config/auto.conf
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include $(srctree)/scripts/Kbuild.include
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MODPOST = scripts/mod/modpost
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modpost-args = \
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$(if $(CONFIG_MODULES),-M) \
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$(if $(CONFIG_MODVERSIONS),-m) \
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$(if $(CONFIG_MODULE_SRCVERSION_ALL),-a) \
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$(if $(CONFIG_SECTION_MISMATCH_WARN_ONLY),,-E) \
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$(if $(KBUILD_MODPOST_WARN),-w) \
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$(if $(KBUILD_NSDEPS),-d $(MODULES_NSDEPS)) \
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$(if $(CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS)$(KBUILD_NSDEPS),-N) \
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$(if $(findstring 1, $(KBUILD_EXTRA_WARN)),-W) \
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-o $@
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modpost-deps := $(MODPOST)
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# 'make -i -k' ignores compile errors, and builds as many modules as possible.
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ifneq ($(findstring i,$(filter-out --%,$(MAKEFLAGS))),)
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modpost-args += -n
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endif
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# Read out modules.order to pass in modpost.
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# Otherwise, allmodconfig would fail with "Argument list too long".
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ifdef KBUILD_MODULES
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modpost-args += -T $(MODORDER)
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modpost-deps += $(MODORDER)
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endif
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ifeq ($(KBUILD_EXTMOD),)
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# Generate the list of in-tree objects in vmlinux
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# ---------------------------------------------------------------------------
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# This is used to retrieve symbol versions generated by genksyms.
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ifdef CONFIG_MODVERSIONS
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vmlinux.symvers Module.symvers: .vmlinux.objs
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endif
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# Ignore libgcc.a
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# Some architectures do '$(CC) --print-libgcc-file-name' to borrow libgcc.a
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# from the toolchain, but there is no EXPORT_SYMBOL in it.
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quiet_cmd_vmlinux_objs = GEN $@
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cmd_vmlinux_objs = \
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for f in $(real-prereqs); do \
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case $${f} in \
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*libgcc.a) ;; \
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*) $(AR) t $${f} ;; \
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esac \
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done > $@
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targets += .vmlinux.objs
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.vmlinux.objs: vmlinux.a $(KBUILD_VMLINUX_LIBS) FORCE
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$(call if_changed,vmlinux_objs)
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ifdef CONFIG_TRIM_UNUSED_KSYMS
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ksym-wl := $(CONFIG_UNUSED_KSYMS_WHITELIST)
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ksym-wl := $(if $(filter-out /%, $(ksym-wl)),$(srctree)/)$(ksym-wl)
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modpost-args += -t $(addprefix -u , $(ksym-wl))
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modpost-deps += $(ksym-wl)
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endif
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ifeq ($(wildcard vmlinux.o),)
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missing-input := vmlinux.o
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output-symdump := modules-only.symvers
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else
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modpost-args += vmlinux.o
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modpost-deps += vmlinux.o
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output-symdump := $(if $(KBUILD_MODULES), Module.symvers, vmlinux.symvers)
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endif
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else
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# set src + obj - they may be used in the modules's Makefile
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obj := $(KBUILD_EXTMOD)
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src := $(if $(VPATH),$(VPATH)/)$(obj)
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# Include the module's Makefile to find KBUILD_EXTRA_SYMBOLS
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include $(kbuild-file)
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output-symdump := $(KBUILD_EXTMOD)/Module.symvers
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ifeq ($(wildcard Module.symvers),)
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missing-input := Module.symvers
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else
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modpost-args += -i Module.symvers
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modpost-deps += Module.symvers
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endif
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modpost-args += -e $(addprefix -i , $(KBUILD_EXTRA_SYMBOLS))
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endif # ($(KBUILD_EXTMOD),)
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quiet_cmd_modpost = MODPOST $@
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cmd_modpost = \
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$(if $(missing-input), \
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echo >&2 "WARNING: $(missing-input) is missing."; \
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echo >&2 " Modules may not have dependencies or modversions."; \
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echo >&2 " You may get many unresolved symbol errors."; \
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echo >&2 " You can set KBUILD_MODPOST_WARN=1 to turn errors into warning"; \
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echo >&2 " if you want to proceed at your own risk.";) \
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$(MODPOST) $(modpost-args)
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targets += $(output-symdump)
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$(output-symdump): $(modpost-deps) FORCE
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$(call if_changed,modpost)
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__modpost: $(output-symdump)
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PHONY += FORCE
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FORCE:
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existing-targets := $(wildcard $(sort $(targets)))
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-include $(foreach f,$(existing-targets),$(dir $(f)).$(notdir $(f)).cmd)
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.PHONY: $(PHONY)
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