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Before updating time and alarm the driver must set appropriate mask in UDR register. For that purpose the driver uses common register configuration and a lot of exceptions per device in the code. The exceptions are not obvious, for example except the change in the logic sometimes the fields are swapped (WUDR and AUDR between S2MPS14 and S2MPS15). This leads to quite complicated code. Try to make it more obvious by: 1. Documenting the UDR masks for devices and operations. 2. Adding fields in register configuration structure for each operation (read time, write time and alarm). 3. Splitting the configuration per S2MPS13, S2MPS14 and S2MPS15 thus removing exceptions for them. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
155 lines
3.8 KiB
C
155 lines
3.8 KiB
C
/* rtc.h
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*
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* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __LINUX_MFD_SEC_RTC_H
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#define __LINUX_MFD_SEC_RTC_H
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enum s5m_rtc_reg {
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S5M_RTC_SEC,
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S5M_RTC_MIN,
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S5M_RTC_HOUR,
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S5M_RTC_WEEKDAY,
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S5M_RTC_DATE,
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S5M_RTC_MONTH,
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S5M_RTC_YEAR1,
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S5M_RTC_YEAR2,
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S5M_ALARM0_SEC,
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S5M_ALARM0_MIN,
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S5M_ALARM0_HOUR,
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S5M_ALARM0_WEEKDAY,
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S5M_ALARM0_DATE,
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S5M_ALARM0_MONTH,
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S5M_ALARM0_YEAR1,
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S5M_ALARM0_YEAR2,
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S5M_ALARM1_SEC,
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S5M_ALARM1_MIN,
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S5M_ALARM1_HOUR,
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S5M_ALARM1_WEEKDAY,
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S5M_ALARM1_DATE,
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S5M_ALARM1_MONTH,
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S5M_ALARM1_YEAR1,
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S5M_ALARM1_YEAR2,
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S5M_ALARM0_CONF,
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S5M_ALARM1_CONF,
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S5M_RTC_STATUS,
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S5M_WTSR_SMPL_CNTL,
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S5M_RTC_UDR_CON,
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S5M_RTC_REG_MAX,
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};
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enum s2mps_rtc_reg {
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S2MPS_RTC_CTRL,
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S2MPS_WTSR_SMPL_CNTL,
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S2MPS_RTC_UDR_CON,
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S2MPS_RSVD,
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S2MPS_RTC_SEC,
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S2MPS_RTC_MIN,
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S2MPS_RTC_HOUR,
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S2MPS_RTC_WEEKDAY,
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S2MPS_RTC_DATE,
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S2MPS_RTC_MONTH,
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S2MPS_RTC_YEAR,
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S2MPS_ALARM0_SEC,
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S2MPS_ALARM0_MIN,
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S2MPS_ALARM0_HOUR,
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S2MPS_ALARM0_WEEKDAY,
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S2MPS_ALARM0_DATE,
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S2MPS_ALARM0_MONTH,
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S2MPS_ALARM0_YEAR,
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S2MPS_ALARM1_SEC,
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S2MPS_ALARM1_MIN,
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S2MPS_ALARM1_HOUR,
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S2MPS_ALARM1_WEEKDAY,
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S2MPS_ALARM1_DATE,
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S2MPS_ALARM1_MONTH,
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S2MPS_ALARM1_YEAR,
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S2MPS_OFFSRC,
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S2MPS_RTC_REG_MAX,
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};
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#define RTC_I2C_ADDR (0x0C >> 1)
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#define HOUR_12 (1 << 7)
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#define HOUR_AMPM (1 << 6)
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#define HOUR_PM (1 << 5)
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#define S5M_ALARM0_STATUS (1 << 1)
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#define S5M_ALARM1_STATUS (1 << 2)
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#define S5M_UPDATE_AD (1 << 0)
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#define S2MPS_ALARM0_STATUS (1 << 2)
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#define S2MPS_ALARM1_STATUS (1 << 1)
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/* RTC Control Register */
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#define BCD_EN_SHIFT 0
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#define BCD_EN_MASK (1 << BCD_EN_SHIFT)
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#define MODEL24_SHIFT 1
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#define MODEL24_MASK (1 << MODEL24_SHIFT)
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/* RTC Update Register1 */
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#define S5M_RTC_UDR_SHIFT 0
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#define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT)
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#define S2MPS_RTC_WUDR_SHIFT 4
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#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
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#define S2MPS15_RTC_AUDR_SHIFT 4
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#define S2MPS15_RTC_AUDR_MASK (1 << S2MPS15_RTC_AUDR_SHIFT)
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#define S2MPS13_RTC_AUDR_SHIFT 1
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#define S2MPS13_RTC_AUDR_MASK (1 << S2MPS13_RTC_AUDR_SHIFT)
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#define S2MPS15_RTC_WUDR_SHIFT 1
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#define S2MPS15_RTC_WUDR_MASK (1 << S2MPS15_RTC_WUDR_SHIFT)
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#define S2MPS_RTC_RUDR_SHIFT 0
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#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
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#define RTC_TCON_SHIFT 1
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#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT)
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#define S5M_RTC_TIME_EN_SHIFT 3
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#define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT)
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/*
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* UDR_T field in S5M_RTC_UDR_CON register determines the time needed
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* for updating alarm and time registers. Default is 7.32 ms.
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*/
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#define S5M_RTC_UDR_T_SHIFT 6
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#define S5M_RTC_UDR_T_MASK (0x3 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_7320_US (0x0 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_1830_US (0x1 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_3660_US (0x2 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_450_US (0x3 << S5M_RTC_UDR_T_SHIFT)
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/* RTC Hour register */
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#define HOUR_PM_SHIFT 6
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#define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
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/* RTC Alarm Enable */
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#define ALARM_ENABLE_SHIFT 7
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#define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
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#define SMPL_ENABLE_SHIFT 7
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#define SMPL_ENABLE_MASK (1 << SMPL_ENABLE_SHIFT)
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#define WTSR_ENABLE_SHIFT 6
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#define WTSR_ENABLE_MASK (1 << WTSR_ENABLE_SHIFT)
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enum {
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RTC_SEC = 0,
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RTC_MIN,
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RTC_HOUR,
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RTC_WEEKDAY,
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RTC_DATE,
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RTC_MONTH,
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RTC_YEAR1,
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RTC_YEAR2,
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};
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#endif /* __LINUX_MFD_SEC_RTC_H */
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