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![Sonic Zhang](/assets/img/avatar_default.png)
Newer Blackfin boards use pinctrl API to manage pins and the legacy peripherial lists are not useful on them. Let's move pin lists into platform data so older boards can still use them and newer boards can use the modern API. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
117 lines
5 KiB
C
117 lines
5 KiB
C
/*
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* board initialization should put one of these structures into platform_data
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* and place the bfin-rotary onto platform_bus named "bfin-rotary".
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*
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* Copyright 2008-2010 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef _BFIN_ROTARY_H
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#define _BFIN_ROTARY_H
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/* mode bitmasks */
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#define ROT_QUAD_ENC CNTMODE_QUADENC /* quadrature/grey code encoder mode */
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#define ROT_BIN_ENC CNTMODE_BINENC /* binary encoder mode */
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#define ROT_UD_CNT CNTMODE_UDCNT /* rotary counter mode */
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#define ROT_DIR_CNT CNTMODE_DIRCNT /* direction counter mode */
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#define ROT_DEBE DEBE /* Debounce Enable */
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#define ROT_CDGINV CDGINV /* CDG Pin Polarity Invert */
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#define ROT_CUDINV CUDINV /* CUD Pin Polarity Invert */
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#define ROT_CZMINV CZMINV /* CZM Pin Polarity Invert */
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struct bfin_rotary_platform_data {
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/* set rotary UP KEY_### or BTN_### in case you prefer
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* bfin-rotary to send EV_KEY otherwise set 0
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*/
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unsigned int rotary_up_key;
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/* set rotary DOWN KEY_### or BTN_### in case you prefer
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* bfin-rotary to send EV_KEY otherwise set 0
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*/
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unsigned int rotary_down_key;
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/* set rotary BUTTON KEY_### or BTN_### */
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unsigned int rotary_button_key;
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/* set rotary Relative Axis REL_### in case you prefer
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* bfin-rotary to send EV_REL otherwise set 0
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*/
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unsigned int rotary_rel_code;
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unsigned short debounce; /* 0..17 */
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unsigned short mode;
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unsigned short pm_wakeup;
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unsigned short *pin_list;
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};
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/* CNT_CONFIG bitmasks */
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#define CNTE (1 << 0) /* Counter Enable */
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#define DEBE (1 << 1) /* Debounce Enable */
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#define CDGINV (1 << 4) /* CDG Pin Polarity Invert */
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#define CUDINV (1 << 5) /* CUD Pin Polarity Invert */
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#define CZMINV (1 << 6) /* CZM Pin Polarity Invert */
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#define CNTMODE_SHIFT 8
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#define CNTMODE (0x7 << CNTMODE_SHIFT) /* Counter Operating Mode */
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#define ZMZC (1 << 1) /* CZM Zeroes Counter Enable */
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#define BNDMODE_SHIFT 12
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#define BNDMODE (0x3 << BNDMODE_SHIFT) /* Boundary register Mode */
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#define INPDIS (1 << 15) /* CUG and CDG Input Disable */
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#define CNTMODE_QUADENC (0 << CNTMODE_SHIFT) /* quadrature encoder mode */
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#define CNTMODE_BINENC (1 << CNTMODE_SHIFT) /* binary encoder mode */
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#define CNTMODE_UDCNT (2 << CNTMODE_SHIFT) /* up/down counter mode */
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#define CNTMODE_DIRCNT (4 << CNTMODE_SHIFT) /* direction counter mode */
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#define CNTMODE_DIRTMR (5 << CNTMODE_SHIFT) /* direction timer mode */
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#define BNDMODE_COMP (0 << BNDMODE_SHIFT) /* boundary compare mode */
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#define BNDMODE_ZERO (1 << BNDMODE_SHIFT) /* boundary compare and zero mode */
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#define BNDMODE_CAPT (2 << BNDMODE_SHIFT) /* boundary capture mode */
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#define BNDMODE_AEXT (3 << BNDMODE_SHIFT) /* boundary auto-extend mode */
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/* CNT_IMASK bitmasks */
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#define ICIE (1 << 0) /* Illegal Gray/Binary Code Interrupt Enable */
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#define UCIE (1 << 1) /* Up count Interrupt Enable */
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#define DCIE (1 << 2) /* Down count Interrupt Enable */
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#define MINCIE (1 << 3) /* Min Count Interrupt Enable */
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#define MAXCIE (1 << 4) /* Max Count Interrupt Enable */
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#define COV31IE (1 << 5) /* Bit 31 Overflow Interrupt Enable */
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#define COV15IE (1 << 6) /* Bit 15 Overflow Interrupt Enable */
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#define CZEROIE (1 << 7) /* Count to Zero Interrupt Enable */
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#define CZMIE (1 << 8) /* CZM Pin Interrupt Enable */
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#define CZMEIE (1 << 9) /* CZM Error Interrupt Enable */
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#define CZMZIE (1 << 10) /* CZM Zeroes Counter Interrupt Enable */
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/* CNT_STATUS bitmasks */
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#define ICII (1 << 0) /* Illegal Gray/Binary Code Interrupt Identifier */
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#define UCII (1 << 1) /* Up count Interrupt Identifier */
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#define DCII (1 << 2) /* Down count Interrupt Identifier */
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#define MINCII (1 << 3) /* Min Count Interrupt Identifier */
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#define MAXCII (1 << 4) /* Max Count Interrupt Identifier */
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#define COV31II (1 << 5) /* Bit 31 Overflow Interrupt Identifier */
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#define COV15II (1 << 6) /* Bit 15 Overflow Interrupt Identifier */
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#define CZEROII (1 << 7) /* Count to Zero Interrupt Identifier */
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#define CZMII (1 << 8) /* CZM Pin Interrupt Identifier */
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#define CZMEII (1 << 9) /* CZM Error Interrupt Identifier */
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#define CZMZII (1 << 10) /* CZM Zeroes Counter Interrupt Identifier */
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/* CNT_COMMAND bitmasks */
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#define W1LCNT 0xf /* Load Counter Register */
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#define W1LMIN 0xf0 /* Load Min Register */
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#define W1LMAX 0xf00 /* Load Max Register */
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#define W1ZMONCE (1 << 12) /* Enable CZM Clear Counter Once */
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#define W1LCNT_ZERO (1 << 0) /* write 1 to load CNT_COUNTER with zero */
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#define W1LCNT_MIN (1 << 2) /* write 1 to load CNT_COUNTER from CNT_MIN */
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#define W1LCNT_MAX (1 << 3) /* write 1 to load CNT_COUNTER from CNT_MAX */
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#define W1LMIN_ZERO (1 << 4) /* write 1 to load CNT_MIN with zero */
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#define W1LMIN_CNT (1 << 5) /* write 1 to load CNT_MIN from CNT_COUNTER */
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#define W1LMIN_MAX (1 << 7) /* write 1 to load CNT_MIN from CNT_MAX */
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#define W1LMAX_ZERO (1 << 8) /* write 1 to load CNT_MAX with zero */
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#define W1LMAX_CNT (1 << 9) /* write 1 to load CNT_MAX from CNT_COUNTER */
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#define W1LMAX_MIN (1 << 10) /* write 1 to load CNT_MAX from CNT_MIN */
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/* CNT_DEBOUNCE bitmasks */
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#define DPRESCALE 0xf /* Load Counter Register */
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#endif
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