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b358e747ae
A timeout of 200ms is much longer than necessary, and delays the decoding decoding of a single scancode and the last scancode when a button is being held. This makes the remote seem sluggish. If the min_timeout and max_timeout values are set, the timeout is configurable via the LIRC_SET_REC_TIMEOUT ioctl. Tested-by: Matthias Reichl <hias@horus.com> Signed-off-by: Sean Young <sean@mess.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
253 lines
6.6 KiB
C
253 lines
6.6 KiB
C
/*
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* Driver for Amlogic Meson IR remote receiver
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*
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* Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/bitfield.h>
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#include <media/rc-core.h>
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#define DRIVER_NAME "meson-ir"
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/* valid on all Meson platforms */
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#define IR_DEC_LDR_ACTIVE 0x00
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#define IR_DEC_LDR_IDLE 0x04
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#define IR_DEC_LDR_REPEAT 0x08
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#define IR_DEC_BIT_0 0x0c
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#define IR_DEC_REG0 0x10
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#define IR_DEC_FRAME 0x14
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#define IR_DEC_STATUS 0x18
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#define IR_DEC_REG1 0x1c
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/* only available on Meson 8b and newer */
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#define IR_DEC_REG2 0x20
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#define REG0_RATE_MASK GENMASK(11, 0)
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#define DECODE_MODE_NEC 0x0
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#define DECODE_MODE_RAW 0x2
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/* Meson 6b uses REG1 to configure the mode */
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#define REG1_MODE_MASK GENMASK(8, 7)
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#define REG1_MODE_SHIFT 7
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/* Meson 8b / GXBB use REG2 to configure the mode */
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#define REG2_MODE_MASK GENMASK(3, 0)
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#define REG2_MODE_SHIFT 0
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#define REG1_TIME_IV_MASK GENMASK(28, 16)
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#define REG1_IRQSEL_MASK GENMASK(3, 2)
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#define REG1_IRQSEL_NEC_MODE 0
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#define REG1_IRQSEL_RISE_FALL 1
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#define REG1_IRQSEL_FALL 2
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#define REG1_IRQSEL_RISE 3
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#define REG1_RESET BIT(0)
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#define REG1_ENABLE BIT(15)
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#define STATUS_IR_DEC_IN BIT(8)
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#define MESON_TRATE 10 /* us */
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struct meson_ir {
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void __iomem *reg;
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struct rc_dev *rc;
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spinlock_t lock;
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};
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static void meson_ir_set_mask(struct meson_ir *ir, unsigned int reg,
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u32 mask, u32 value)
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{
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u32 data;
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data = readl(ir->reg + reg);
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data &= ~mask;
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data |= (value & mask);
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writel(data, ir->reg + reg);
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}
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static irqreturn_t meson_ir_irq(int irqno, void *dev_id)
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{
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struct meson_ir *ir = dev_id;
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u32 duration, status;
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DEFINE_IR_RAW_EVENT(rawir);
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spin_lock(&ir->lock);
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duration = readl_relaxed(ir->reg + IR_DEC_REG1);
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duration = FIELD_GET(REG1_TIME_IV_MASK, duration);
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rawir.duration = US_TO_NS(duration * MESON_TRATE);
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status = readl_relaxed(ir->reg + IR_DEC_STATUS);
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rawir.pulse = !!(status & STATUS_IR_DEC_IN);
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ir_raw_event_store_with_timeout(ir->rc, &rawir);
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spin_unlock(&ir->lock);
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return IRQ_HANDLED;
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}
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static int meson_ir_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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struct resource *res;
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const char *map_name;
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struct meson_ir *ir;
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int irq, ret;
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ir = devm_kzalloc(dev, sizeof(struct meson_ir), GFP_KERNEL);
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if (!ir)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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ir->reg = devm_ioremap_resource(dev, res);
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if (IS_ERR(ir->reg)) {
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dev_err(dev, "failed to map registers\n");
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return PTR_ERR(ir->reg);
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}
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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dev_err(dev, "no irq resource\n");
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return irq;
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}
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ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW);
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if (!ir->rc) {
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dev_err(dev, "failed to allocate rc device\n");
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return -ENOMEM;
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}
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ir->rc->priv = ir;
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ir->rc->device_name = DRIVER_NAME;
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ir->rc->input_phys = DRIVER_NAME "/input0";
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ir->rc->input_id.bustype = BUS_HOST;
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map_name = of_get_property(node, "linux,rc-map-name", NULL);
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ir->rc->map_name = map_name ? map_name : RC_MAP_EMPTY;
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ir->rc->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER;
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ir->rc->rx_resolution = US_TO_NS(MESON_TRATE);
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ir->rc->min_timeout = 1;
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ir->rc->timeout = IR_DEFAULT_TIMEOUT;
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ir->rc->max_timeout = 10 * IR_DEFAULT_TIMEOUT;
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ir->rc->driver_name = DRIVER_NAME;
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spin_lock_init(&ir->lock);
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platform_set_drvdata(pdev, ir);
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ret = devm_rc_register_device(dev, ir->rc);
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if (ret) {
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dev_err(dev, "failed to register rc device\n");
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return ret;
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}
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ret = devm_request_irq(dev, irq, meson_ir_irq, 0, NULL, ir);
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if (ret) {
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dev_err(dev, "failed to request irq\n");
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return ret;
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}
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/* Reset the decoder */
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, REG1_RESET);
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_RESET, 0);
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/* Set general operation mode (= raw/software decoding) */
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if (of_device_is_compatible(node, "amlogic,meson6-ir"))
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
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FIELD_PREP(REG1_MODE_MASK, DECODE_MODE_RAW));
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else
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meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
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FIELD_PREP(REG2_MODE_MASK, DECODE_MODE_RAW));
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/* Set rate */
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meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, MESON_TRATE - 1);
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/* IRQ on rising and falling edges */
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_IRQSEL_MASK,
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FIELD_PREP(REG1_IRQSEL_MASK, REG1_IRQSEL_RISE_FALL));
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/* Enable the decoder */
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, REG1_ENABLE);
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dev_info(dev, "receiver initialized\n");
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return 0;
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}
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static int meson_ir_remove(struct platform_device *pdev)
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{
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struct meson_ir *ir = platform_get_drvdata(pdev);
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unsigned long flags;
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/* Disable the decoder */
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spin_lock_irqsave(&ir->lock, flags);
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_ENABLE, 0);
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spin_unlock_irqrestore(&ir->lock, flags);
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return 0;
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}
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static void meson_ir_shutdown(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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struct meson_ir *ir = platform_get_drvdata(pdev);
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unsigned long flags;
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spin_lock_irqsave(&ir->lock, flags);
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/*
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* Set operation mode to NEC/hardware decoding to give
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* bootloader a chance to power the system back on
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*/
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if (of_device_is_compatible(node, "amlogic,meson6-ir"))
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meson_ir_set_mask(ir, IR_DEC_REG1, REG1_MODE_MASK,
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DECODE_MODE_NEC << REG1_MODE_SHIFT);
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else
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meson_ir_set_mask(ir, IR_DEC_REG2, REG2_MODE_MASK,
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DECODE_MODE_NEC << REG2_MODE_SHIFT);
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/* Set rate to default value */
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meson_ir_set_mask(ir, IR_DEC_REG0, REG0_RATE_MASK, 0x13);
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spin_unlock_irqrestore(&ir->lock, flags);
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}
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static const struct of_device_id meson_ir_match[] = {
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{ .compatible = "amlogic,meson6-ir" },
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{ .compatible = "amlogic,meson8b-ir" },
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{ .compatible = "amlogic,meson-gxbb-ir" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, meson_ir_match);
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static struct platform_driver meson_ir_driver = {
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.probe = meson_ir_probe,
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.remove = meson_ir_remove,
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.shutdown = meson_ir_shutdown,
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.driver = {
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.name = DRIVER_NAME,
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.of_match_table = meson_ir_match,
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},
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};
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module_platform_driver(meson_ir_driver);
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MODULE_DESCRIPTION("Amlogic Meson IR remote receiver driver");
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MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
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MODULE_LICENSE("GPL v2");
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