Arnd Bergmann 095ee35a33 memory: tegra: Changes for v6.5-rc1 ... This introduces an interconnect provider for the memory controller and external memory controller found on Tegra234 chips that will eventually be used to dynamically scale the EMC frequency based on a device's bandwidth needs. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmSDRTcTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoaKyD/4sjVTfnZ9YoXkcPFd6zr1I8pNMC2pk yyDtSHN0EGcw5goSHF+Akqv5O0JEh8YAW0pQ+fxO3KdEGlZEYNBlC9rgjpz7TzHE 6zsajiIvLYOwSTbjVVlFn2U4H6ihFdawzag/vRDqu1b3wExus9VigWnEgHtj/RJT q1ODZXkwZrOBR3Z034ji6jJIQXVg54sEvt/Zlq7iYXabLXg8u5NDEbSd4GVBNwPB SwBUfc9ja/Y5xUKaXA/hqQ7gIfm4Hs5XVyCbLT75j259qVantbxtlURB3cme080m rRdyScngYFxuyBzQtQzLq+6u5tYJN6q3WUlXWvxI/gMw2IezFH6p0jXfCByriSMD 6d7h6Jk2d6bub3RUWLsurruHYSPqqvM9tI5sN6ZY4nq4uo0MplFEcrQBFXIJAJhy X/JaO9166K0mX73wNFoEmmay5ZTd8wLKvGdlfaHUdUKJcldhh3Ivhl2r0w9Ij6qE w1+QjUxtgabSb/69+3o2m4iil2I5Scc8jr3Vu1riW1yemKSQX7xS0PZ4a6k5/78O 2NGaFZqvs7Uo1EYGz91f50Go1hGLZOH0MMMjd+NSj3pZQvpB+BZ8rlGG7umbjIUF aTBj5hcXN3bBx4VQGnLFwUEbEd6GIog+d6COtpmQzixwdXxw8aUB/m7ouFSegz34 MMEoE0i11HMlyg== =OJYg -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSTVC0ACgkQYKtH/8kJ UieyxRAAiJKwY9bILWnKTPIJ+AlTDzp5ramSVsjD7KzlH6/pgWydgzRRhP/9zz87 f1/wnmMJ2vgWWa1g1NfeX4P8vZyHYsGiuBvQrevzP6Ekc0q19j6CI5tu5zDTy1aF dqZtkpOTqO5+ioTL5bTem2XISvWNnK1TyaWzSHnvbNgfvrWtMiqij9mJyeaF3hdm yCN0XbO8UaChbUobjgjzwg09BvrsN2CtG/2DATIgHUWDrkW0vER0QZRCF0V9mg3O 5kszkfLAsm/7TcQiPAeHEc2IXNRnYl1f4Gkjg7e47Itxkv5+rm/liejdYMZfIQmc Kj0eQerTB974qrcBsrwVE12lNwDK4+3FbAWOZjbXaLtYf27+pSjoG0YVduv8VUNi H81ehi+pHma7Boekf2i9XMVC1+EBBlpPBjxCpaDN5ck7kIkO2bBMX9avTGE9qfn5 9lpU64z6xHv/3YEcnOty4Ggs0V3ZLz4iRkFfWUDtYYsXnFyes1K9ooaDzHojisk0 /vE0KqImlZdlBuBUYpgEBcM/s4V1PtpN3nQtVpUUb77M90GmTLGwLjM8+Y1+JuXV N9eGiPR8YhuMzy4eQR4YEfIqPqwEstRqkOicctJaCDi3Hg4OXmUdUDS66vV9wm+V ntfdphilxBp2EHG42IhKkVH5LdSm/17xbxd2t1RwZ7cMZ7Q5hpw= =7PpG -----END PGP SIGNATURE----- Merge tag 'tegra-for-6.5-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers memory: tegra: Changes for v6.5-rc1 This introduces an interconnect provider for the memory controller and external memory controller found on Tegra234 chips that will eventually be used to dynamically scale the EMC frequency based on a device's bandwidth needs. * tag 'tegra-for-6.5-memory' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: memory: tegra: Make CPU cluster BW request a multiple of MC channels memory: tegra: Add software memory clients in Tegra234 memory: tegra: Add memory clients for Tegra234 memory: tegra: Add interconnect support for DRAM scaling in Tegra234 dt-bindings: tegra: Add ICC IDs for dummy memory clients dt-bindings: tegra: Document compatible for IGX Link: https://lore.kernel.org/r/20230609193620.2275240-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2023-06-21 21:49:01 +02:00
..
ahb.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
bpmp-abi.h	firmware: tegra: Update BPMP ABI	2022-11-17 23:34:17 +01:00
bpmp.h	firmware: tegra: bpmp: Use iosys-map helpers	2022-10-24 15:18:11 +02:00
common.h	soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()	2021-12-16 14:03:38 +01:00
cpuidle.h	cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle	2020-03-13 11:31:58 +01:00
flowctrl.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 399	2019-06-05 17:37:12 +02:00
fuse.h	soc/tegra: fuse: Add support for Tegra264	2023-05-16 10:58:50 +02:00
irq.h	soc/tegra: irq: Add stubs needed for compile testing	2021-10-04 21:27:21 +02:00
ivc.h	firmware: tegra: Changes for v6.2-rc1	2022-11-22 22:14:39 +01:00
mc.h	memory: tegra: Make CPU cluster BW request a multiple of MC channels	2023-05-16 12:11:01 +02:00
pm.h	soc/tegra: pm: Make stubs usable for compile testing	2021-10-04 21:27:40 +02:00
pmc.h	soc/tegra: pmc: Add I/O pad table for Tegra234	2022-11-10 02:21:12 +01:00
tegra-cbb.h	soc/tegra: cbb: Add CBB 1.0 driver for Tegra194	2022-09-15 12:41:36 +02:00