184 lines
4.4 KiB
YAML
184 lines
4.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra Display Controller
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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properties:
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$nodename:
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pattern: "^dc@[0-9a-f]+$"
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compatible:
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oneOf:
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- enum:
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- nvidia,tegra20-dc
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- nvidia,tegra30-dc
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- nvidia,tegra114-dc
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- nvidia,tegra124-dc
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- nvidia,tegra210-dc
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- items:
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- const: nvidia,tegra124-dc
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- const: nvidia,tegra132-dc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: display controller pixel clock
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- description: parent clock # optional
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clock-names:
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minItems: 1
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items:
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- const: dc
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- const: parent # optional
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resets:
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items:
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- description: module reset
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reset-names:
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items:
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- const: dc
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interconnect-names: true
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interconnects: true
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iommus:
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maxItems: 1
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operating-points-v2:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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power-domains:
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items:
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- description: phandle to the core power domain
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memory-region: true
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nvidia,head:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: The number of the display controller head. This is used to setup the various
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types of output to receive video data from the given head.
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nvidia,outputs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: A list of phandles of outputs that this display controller can drive.
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rgb:
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type: object
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra20-dc
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- nvidia,tegra30-dc
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- nvidia,tegra114-dc
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then:
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properties:
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interconnects:
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items:
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- description: window A memory client
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- description: window B memory client
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- description: window B memory client (vertical filter)
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- description: window C memory client
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- description: cursor memory client
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interconnect-names:
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items:
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- const: wina
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- const: winb
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- const: winb-vfilter
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- const: winc
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- const: cursor
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rgb:
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description: Each display controller node has a child node, named "rgb", that represents
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the RGB output associated with the controller.
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type: object
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properties:
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nvidia,ddc-i2c-bus:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle of an I2C controller used for DDC EDID probing
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nvidia,hpd-gpio:
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description: specifies a GPIO used for hotplug detection
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maxItems: 1
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nvidia,edid:
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$ref: /schemas/types.yaml#/definitions/uint8-array
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description: supplies a binary EDID blob
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nvidia,panel:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle of a display panel
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- if:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra124-dc
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then:
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properties:
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interconnects:
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minItems: 4
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items:
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- description: window A memory client
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- description: window B memory client
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- description: window C memory client
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- description: cursor memory client
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- description: window D memory client
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- description: window T memory client
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interconnect-names:
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minItems: 4
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items:
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- const: wina
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- const: winb
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- const: winc
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- const: cursor
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- const: wind
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- const: wint
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additionalProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- reset-names
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examples:
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- |
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#include <dt-bindings/clock/tegra20-car.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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dc@54200000 {
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compatible = "nvidia,tegra20-dc";
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reg = <0x54200000 0x00040000>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA20_CLK_DISP1>;
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clock-names = "dc";
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resets = <&tegra_car 27>;
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reset-names = "dc";
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};
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