Cristian Ciocaltea b46a22dea7 arm64: dts: rockchip: Assign PLL_PPLL clock rate to 1.1 GHz on rk3588s ... The clock rate for PLL_PPLL has been wrongly initialized to 100 MHz instead of 1.1 GHz. Fix it. Fixes: c9211fa260 ("arm64: dts: rockchip: Add base DT for rk3588 SoC") Reported-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230402095054.384739-3-cristian.ciocaltea@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2023-04-05 19:30:20 +02:00
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boot	arm64: dts: rockchip: Assign PLL_PPLL clock rate to 1.1 GHz on rk3588s	2023-04-05 19:30:20 +02:00
configs	ARM: SoC fixes for 6.3, part 1	2023-02-27 10:09:40 -08:00
crypto	crypto: arm64/sm4-gcm - Fix possible crash in GCM cryption	2023-02-10 17:20:19 +08:00
hyperv
include	arm64 fixes:	2023-03-02 14:57:53 -08:00
kernel	arm64 fixes:	2023-03-02 14:57:53 -08:00
kvm	ARM:	2023-02-25 11:30:21 -08:00
lib
mm	arm64 fixes:	2023-03-02 14:57:53 -08:00
net
tools	ARM:	2023-02-25 11:30:21 -08:00
xen
Kbuild
Kconfig	arm64 fixes:	2023-03-02 14:57:53 -08:00
Kconfig.debug
Kconfig.platforms	arm64 updates for 6.3:	2023-02-21 15:27:48 -08:00
Makefile	arm64 updates for 6.3:	2023-02-21 15:27:48 -08:00