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![Tony Luck](/assets/img/avatar_default.png)
SGX reserved memory does not appear in the standard address maps. Add hook to call into the SGX code to check if an address is located in SGX memory. There are other challenges in injecting errors into SGX. Update the documentation with a sequence of operations to inject. Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org> Tested-by: Reinette Chatre <reinette.chatre@intel.com> Link: https://lkml.kernel.org/r/20211026220050.697075-7-tony.luck@intel.com
794 lines
21 KiB
C
794 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* APEI Error INJection support
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*
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* EINJ provides a hardware error injection mechanism, this is useful
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* for debugging and testing of other APEI and RAS features.
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*
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* For more information about EINJ, please refer to ACPI Specification
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* version 4.0, section 17.5.
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*
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* Copyright 2009-2010 Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/nmi.h>
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#include <linux/delay.h>
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#include <linux/mm.h>
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#include <asm/unaligned.h>
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#include "apei-internal.h"
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#undef pr_fmt
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#define pr_fmt(fmt) "EINJ: " fmt
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#define SLEEP_UNIT_MIN 1000 /* 1ms */
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#define SLEEP_UNIT_MAX 5000 /* 5ms */
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/* Firmware should respond within 1 seconds */
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#define FIRMWARE_TIMEOUT (1 * USEC_PER_SEC)
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#define ACPI5_VENDOR_BIT BIT(31)
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#define MEM_ERROR_MASK (ACPI_EINJ_MEMORY_CORRECTABLE | \
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ACPI_EINJ_MEMORY_UNCORRECTABLE | \
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ACPI_EINJ_MEMORY_FATAL)
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/*
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* ACPI version 5 provides a SET_ERROR_TYPE_WITH_ADDRESS action.
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*/
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static int acpi5;
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struct set_error_type_with_address {
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u32 type;
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u32 vendor_extension;
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u32 flags;
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u32 apicid;
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u64 memory_address;
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u64 memory_address_range;
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u32 pcie_sbdf;
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};
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enum {
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SETWA_FLAGS_APICID = 1,
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SETWA_FLAGS_MEM = 2,
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SETWA_FLAGS_PCIE_SBDF = 4,
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};
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/*
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* Vendor extensions for platform specific operations
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*/
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struct vendor_error_type_extension {
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u32 length;
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u32 pcie_sbdf;
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u16 vendor_id;
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u16 device_id;
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u8 rev_id;
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u8 reserved[3];
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};
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static u32 notrigger;
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static u32 vendor_flags;
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static struct debugfs_blob_wrapper vendor_blob;
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static char vendor_dev[64];
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/*
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* Some BIOSes allow parameters to the SET_ERROR_TYPE entries in the
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* EINJ table through an unpublished extension. Use with caution as
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* most will ignore the parameter and make their own choice of address
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* for error injection. This extension is used only if
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* param_extension module parameter is specified.
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*/
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struct einj_parameter {
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u64 type;
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u64 reserved1;
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u64 reserved2;
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u64 param1;
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u64 param2;
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};
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#define EINJ_OP_BUSY 0x1
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#define EINJ_STATUS_SUCCESS 0x0
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#define EINJ_STATUS_FAIL 0x1
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#define EINJ_STATUS_INVAL 0x2
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#define EINJ_TAB_ENTRY(tab) \
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((struct acpi_whea_header *)((char *)(tab) + \
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sizeof(struct acpi_table_einj)))
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static bool param_extension;
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module_param(param_extension, bool, 0);
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static struct acpi_table_einj *einj_tab;
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static struct apei_resources einj_resources;
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static struct apei_exec_ins_type einj_ins_type[] = {
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[ACPI_EINJ_READ_REGISTER] = {
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.flags = APEI_EXEC_INS_ACCESS_REGISTER,
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.run = apei_exec_read_register,
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},
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[ACPI_EINJ_READ_REGISTER_VALUE] = {
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.flags = APEI_EXEC_INS_ACCESS_REGISTER,
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.run = apei_exec_read_register_value,
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},
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[ACPI_EINJ_WRITE_REGISTER] = {
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.flags = APEI_EXEC_INS_ACCESS_REGISTER,
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.run = apei_exec_write_register,
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},
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[ACPI_EINJ_WRITE_REGISTER_VALUE] = {
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.flags = APEI_EXEC_INS_ACCESS_REGISTER,
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.run = apei_exec_write_register_value,
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},
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[ACPI_EINJ_NOOP] = {
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.flags = 0,
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.run = apei_exec_noop,
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},
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};
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/*
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* Prevent EINJ interpreter to run simultaneously, because the
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* corresponding firmware implementation may not work properly when
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* invoked simultaneously.
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*/
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static DEFINE_MUTEX(einj_mutex);
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static void *einj_param;
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static void einj_exec_ctx_init(struct apei_exec_context *ctx)
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{
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apei_exec_ctx_init(ctx, einj_ins_type, ARRAY_SIZE(einj_ins_type),
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EINJ_TAB_ENTRY(einj_tab), einj_tab->entries);
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}
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static int __einj_get_available_error_type(u32 *type)
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{
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struct apei_exec_context ctx;
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int rc;
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einj_exec_ctx_init(&ctx);
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rc = apei_exec_run(&ctx, ACPI_EINJ_GET_ERROR_TYPE);
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if (rc)
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return rc;
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*type = apei_exec_ctx_get_output(&ctx);
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return 0;
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}
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/* Get error injection capabilities of the platform */
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static int einj_get_available_error_type(u32 *type)
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{
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int rc;
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mutex_lock(&einj_mutex);
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rc = __einj_get_available_error_type(type);
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mutex_unlock(&einj_mutex);
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return rc;
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}
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static int einj_timedout(u64 *t)
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{
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if ((s64)*t < SLEEP_UNIT_MIN) {
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pr_warn(FW_WARN "Firmware does not respond in time\n");
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return 1;
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}
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*t -= SLEEP_UNIT_MIN;
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usleep_range(SLEEP_UNIT_MIN, SLEEP_UNIT_MAX);
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return 0;
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}
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static void check_vendor_extension(u64 paddr,
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struct set_error_type_with_address *v5param)
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{
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int offset = v5param->vendor_extension;
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struct vendor_error_type_extension *v;
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u32 sbdf;
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if (!offset)
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return;
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v = acpi_os_map_iomem(paddr + offset, sizeof(*v));
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if (!v)
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return;
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sbdf = v->pcie_sbdf;
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sprintf(vendor_dev, "%x:%x:%x.%x vendor_id=%x device_id=%x rev_id=%x\n",
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sbdf >> 24, (sbdf >> 16) & 0xff,
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(sbdf >> 11) & 0x1f, (sbdf >> 8) & 0x7,
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v->vendor_id, v->device_id, v->rev_id);
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acpi_os_unmap_iomem(v, sizeof(*v));
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}
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static void *einj_get_parameter_address(void)
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{
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int i;
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u64 pa_v4 = 0, pa_v5 = 0;
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struct acpi_whea_header *entry;
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entry = EINJ_TAB_ENTRY(einj_tab);
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for (i = 0; i < einj_tab->entries; i++) {
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if (entry->action == ACPI_EINJ_SET_ERROR_TYPE &&
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entry->instruction == ACPI_EINJ_WRITE_REGISTER &&
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entry->register_region.space_id ==
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ACPI_ADR_SPACE_SYSTEM_MEMORY)
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pa_v4 = get_unaligned(&entry->register_region.address);
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if (entry->action == ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS &&
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entry->instruction == ACPI_EINJ_WRITE_REGISTER &&
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entry->register_region.space_id ==
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ACPI_ADR_SPACE_SYSTEM_MEMORY)
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pa_v5 = get_unaligned(&entry->register_region.address);
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entry++;
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}
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if (pa_v5) {
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struct set_error_type_with_address *v5param;
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v5param = acpi_os_map_iomem(pa_v5, sizeof(*v5param));
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if (v5param) {
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acpi5 = 1;
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check_vendor_extension(pa_v5, v5param);
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return v5param;
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}
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}
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if (param_extension && pa_v4) {
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struct einj_parameter *v4param;
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v4param = acpi_os_map_iomem(pa_v4, sizeof(*v4param));
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if (!v4param)
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return NULL;
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if (v4param->reserved1 || v4param->reserved2) {
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acpi_os_unmap_iomem(v4param, sizeof(*v4param));
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return NULL;
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}
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return v4param;
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}
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return NULL;
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}
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/* do sanity check to trigger table */
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static int einj_check_trigger_header(struct acpi_einj_trigger *trigger_tab)
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{
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if (trigger_tab->header_size != sizeof(struct acpi_einj_trigger))
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return -EINVAL;
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if (trigger_tab->table_size > PAGE_SIZE ||
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trigger_tab->table_size < trigger_tab->header_size)
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return -EINVAL;
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if (trigger_tab->entry_count !=
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(trigger_tab->table_size - trigger_tab->header_size) /
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sizeof(struct acpi_einj_entry))
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return -EINVAL;
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return 0;
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}
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static struct acpi_generic_address *einj_get_trigger_parameter_region(
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struct acpi_einj_trigger *trigger_tab, u64 param1, u64 param2)
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{
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int i;
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struct acpi_whea_header *entry;
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entry = (struct acpi_whea_header *)
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((char *)trigger_tab + sizeof(struct acpi_einj_trigger));
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for (i = 0; i < trigger_tab->entry_count; i++) {
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if (entry->action == ACPI_EINJ_TRIGGER_ERROR &&
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entry->instruction <= ACPI_EINJ_WRITE_REGISTER_VALUE &&
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entry->register_region.space_id ==
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ACPI_ADR_SPACE_SYSTEM_MEMORY &&
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(entry->register_region.address & param2) == (param1 & param2))
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return &entry->register_region;
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entry++;
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}
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return NULL;
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}
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/* Execute instructions in trigger error action table */
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static int __einj_error_trigger(u64 trigger_paddr, u32 type,
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u64 param1, u64 param2)
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{
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struct acpi_einj_trigger *trigger_tab = NULL;
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struct apei_exec_context trigger_ctx;
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struct apei_resources trigger_resources;
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struct acpi_whea_header *trigger_entry;
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struct resource *r;
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u32 table_size;
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int rc = -EIO;
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struct acpi_generic_address *trigger_param_region = NULL;
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r = request_mem_region(trigger_paddr, sizeof(*trigger_tab),
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"APEI EINJ Trigger Table");
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if (!r) {
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pr_err("Can not request [mem %#010llx-%#010llx] for Trigger table\n",
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(unsigned long long)trigger_paddr,
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(unsigned long long)trigger_paddr +
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sizeof(*trigger_tab) - 1);
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goto out;
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}
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trigger_tab = ioremap_cache(trigger_paddr, sizeof(*trigger_tab));
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if (!trigger_tab) {
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pr_err("Failed to map trigger table!\n");
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goto out_rel_header;
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}
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rc = einj_check_trigger_header(trigger_tab);
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if (rc) {
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pr_warn(FW_BUG "Invalid trigger error action table.\n");
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goto out_rel_header;
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}
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/* No action structures in the TRIGGER_ERROR table, nothing to do */
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if (!trigger_tab->entry_count)
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goto out_rel_header;
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rc = -EIO;
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table_size = trigger_tab->table_size;
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r = request_mem_region(trigger_paddr + sizeof(*trigger_tab),
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table_size - sizeof(*trigger_tab),
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"APEI EINJ Trigger Table");
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if (!r) {
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pr_err("Can not request [mem %#010llx-%#010llx] for Trigger Table Entry\n",
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(unsigned long long)trigger_paddr + sizeof(*trigger_tab),
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(unsigned long long)trigger_paddr + table_size - 1);
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goto out_rel_header;
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}
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iounmap(trigger_tab);
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trigger_tab = ioremap_cache(trigger_paddr, table_size);
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if (!trigger_tab) {
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pr_err("Failed to map trigger table!\n");
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goto out_rel_entry;
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}
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trigger_entry = (struct acpi_whea_header *)
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((char *)trigger_tab + sizeof(struct acpi_einj_trigger));
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apei_resources_init(&trigger_resources);
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apei_exec_ctx_init(&trigger_ctx, einj_ins_type,
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ARRAY_SIZE(einj_ins_type),
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trigger_entry, trigger_tab->entry_count);
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rc = apei_exec_collect_resources(&trigger_ctx, &trigger_resources);
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if (rc)
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goto out_fini;
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rc = apei_resources_sub(&trigger_resources, &einj_resources);
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if (rc)
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goto out_fini;
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/*
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* Some firmware will access target address specified in
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* param1 to trigger the error when injecting memory error.
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* This will cause resource conflict with regular memory. So
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* remove it from trigger table resources.
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*/
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if ((param_extension || acpi5) && (type & MEM_ERROR_MASK) && param2) {
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struct apei_resources addr_resources;
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apei_resources_init(&addr_resources);
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trigger_param_region = einj_get_trigger_parameter_region(
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trigger_tab, param1, param2);
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if (trigger_param_region) {
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rc = apei_resources_add(&addr_resources,
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trigger_param_region->address,
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trigger_param_region->bit_width/8, true);
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if (rc)
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goto out_fini;
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rc = apei_resources_sub(&trigger_resources,
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&addr_resources);
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}
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apei_resources_fini(&addr_resources);
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if (rc)
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goto out_fini;
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}
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rc = apei_resources_request(&trigger_resources, "APEI EINJ Trigger");
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if (rc)
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goto out_fini;
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rc = apei_exec_pre_map_gars(&trigger_ctx);
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if (rc)
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goto out_release;
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rc = apei_exec_run(&trigger_ctx, ACPI_EINJ_TRIGGER_ERROR);
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apei_exec_post_unmap_gars(&trigger_ctx);
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out_release:
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apei_resources_release(&trigger_resources);
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out_fini:
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apei_resources_fini(&trigger_resources);
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out_rel_entry:
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release_mem_region(trigger_paddr + sizeof(*trigger_tab),
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table_size - sizeof(*trigger_tab));
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out_rel_header:
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release_mem_region(trigger_paddr, sizeof(*trigger_tab));
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out:
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if (trigger_tab)
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iounmap(trigger_tab);
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return rc;
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}
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static int __einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
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u64 param3, u64 param4)
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{
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struct apei_exec_context ctx;
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u64 val, trigger_paddr, timeout = FIRMWARE_TIMEOUT;
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int rc;
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einj_exec_ctx_init(&ctx);
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rc = apei_exec_run_optional(&ctx, ACPI_EINJ_BEGIN_OPERATION);
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if (rc)
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return rc;
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apei_exec_ctx_set_input(&ctx, type);
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if (acpi5) {
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struct set_error_type_with_address *v5param = einj_param;
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v5param->type = type;
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if (type & ACPI5_VENDOR_BIT) {
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switch (vendor_flags) {
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case SETWA_FLAGS_APICID:
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v5param->apicid = param1;
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break;
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case SETWA_FLAGS_MEM:
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v5param->memory_address = param1;
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v5param->memory_address_range = param2;
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break;
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case SETWA_FLAGS_PCIE_SBDF:
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v5param->pcie_sbdf = param1;
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break;
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}
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v5param->flags = vendor_flags;
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} else if (flags) {
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v5param->flags = flags;
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v5param->memory_address = param1;
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v5param->memory_address_range = param2;
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v5param->apicid = param3;
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v5param->pcie_sbdf = param4;
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} else {
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switch (type) {
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case ACPI_EINJ_PROCESSOR_CORRECTABLE:
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case ACPI_EINJ_PROCESSOR_UNCORRECTABLE:
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case ACPI_EINJ_PROCESSOR_FATAL:
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v5param->apicid = param1;
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v5param->flags = SETWA_FLAGS_APICID;
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break;
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case ACPI_EINJ_MEMORY_CORRECTABLE:
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case ACPI_EINJ_MEMORY_UNCORRECTABLE:
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case ACPI_EINJ_MEMORY_FATAL:
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v5param->memory_address = param1;
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v5param->memory_address_range = param2;
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v5param->flags = SETWA_FLAGS_MEM;
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break;
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case ACPI_EINJ_PCIX_CORRECTABLE:
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case ACPI_EINJ_PCIX_UNCORRECTABLE:
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case ACPI_EINJ_PCIX_FATAL:
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v5param->pcie_sbdf = param1;
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v5param->flags = SETWA_FLAGS_PCIE_SBDF;
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break;
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}
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}
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} else {
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rc = apei_exec_run(&ctx, ACPI_EINJ_SET_ERROR_TYPE);
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if (rc)
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return rc;
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if (einj_param) {
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struct einj_parameter *v4param = einj_param;
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v4param->param1 = param1;
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v4param->param2 = param2;
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}
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}
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rc = apei_exec_run(&ctx, ACPI_EINJ_EXECUTE_OPERATION);
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if (rc)
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return rc;
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for (;;) {
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rc = apei_exec_run(&ctx, ACPI_EINJ_CHECK_BUSY_STATUS);
|
|
if (rc)
|
|
return rc;
|
|
val = apei_exec_ctx_get_output(&ctx);
|
|
if (!(val & EINJ_OP_BUSY))
|
|
break;
|
|
if (einj_timedout(&timeout))
|
|
return -EIO;
|
|
}
|
|
rc = apei_exec_run(&ctx, ACPI_EINJ_GET_COMMAND_STATUS);
|
|
if (rc)
|
|
return rc;
|
|
val = apei_exec_ctx_get_output(&ctx);
|
|
if (val != EINJ_STATUS_SUCCESS)
|
|
return -EBUSY;
|
|
|
|
rc = apei_exec_run(&ctx, ACPI_EINJ_GET_TRIGGER_TABLE);
|
|
if (rc)
|
|
return rc;
|
|
trigger_paddr = apei_exec_ctx_get_output(&ctx);
|
|
if (notrigger == 0) {
|
|
rc = __einj_error_trigger(trigger_paddr, type, param1, param2);
|
|
if (rc)
|
|
return rc;
|
|
}
|
|
rc = apei_exec_run_optional(&ctx, ACPI_EINJ_END_OPERATION);
|
|
|
|
return rc;
|
|
}
|
|
|
|
/* Inject the specified hardware error */
|
|
static int einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
|
|
u64 param3, u64 param4)
|
|
{
|
|
int rc;
|
|
u64 base_addr, size;
|
|
|
|
/* If user manually set "flags", make sure it is legal */
|
|
if (flags && (flags &
|
|
~(SETWA_FLAGS_APICID|SETWA_FLAGS_MEM|SETWA_FLAGS_PCIE_SBDF)))
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* We need extra sanity checks for memory errors.
|
|
* Other types leap directly to injection.
|
|
*/
|
|
|
|
/* ensure param1/param2 existed */
|
|
if (!(param_extension || acpi5))
|
|
goto inject;
|
|
|
|
/* ensure injection is memory related */
|
|
if (type & ACPI5_VENDOR_BIT) {
|
|
if (vendor_flags != SETWA_FLAGS_MEM)
|
|
goto inject;
|
|
} else if (!(type & MEM_ERROR_MASK) && !(flags & SETWA_FLAGS_MEM))
|
|
goto inject;
|
|
|
|
/*
|
|
* Disallow crazy address masks that give BIOS leeway to pick
|
|
* injection address almost anywhere. Insist on page or
|
|
* better granularity and that target address is normal RAM or
|
|
* NVDIMM.
|
|
*/
|
|
base_addr = param1 & param2;
|
|
size = ~param2 + 1;
|
|
|
|
if (((param2 & PAGE_MASK) != PAGE_MASK) ||
|
|
((region_intersects(base_addr, size, IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE)
|
|
!= REGION_INTERSECTS) &&
|
|
(region_intersects(base_addr, size, IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY)
|
|
!= REGION_INTERSECTS) &&
|
|
!arch_is_platform_page(base_addr)))
|
|
return -EINVAL;
|
|
|
|
inject:
|
|
mutex_lock(&einj_mutex);
|
|
rc = __einj_error_inject(type, flags, param1, param2, param3, param4);
|
|
mutex_unlock(&einj_mutex);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static u32 error_type;
|
|
static u32 error_flags;
|
|
static u64 error_param1;
|
|
static u64 error_param2;
|
|
static u64 error_param3;
|
|
static u64 error_param4;
|
|
static struct dentry *einj_debug_dir;
|
|
|
|
static int available_error_type_show(struct seq_file *m, void *v)
|
|
{
|
|
int rc;
|
|
u32 available_error_type = 0;
|
|
|
|
rc = einj_get_available_error_type(&available_error_type);
|
|
if (rc)
|
|
return rc;
|
|
if (available_error_type & 0x0001)
|
|
seq_printf(m, "0x00000001\tProcessor Correctable\n");
|
|
if (available_error_type & 0x0002)
|
|
seq_printf(m, "0x00000002\tProcessor Uncorrectable non-fatal\n");
|
|
if (available_error_type & 0x0004)
|
|
seq_printf(m, "0x00000004\tProcessor Uncorrectable fatal\n");
|
|
if (available_error_type & 0x0008)
|
|
seq_printf(m, "0x00000008\tMemory Correctable\n");
|
|
if (available_error_type & 0x0010)
|
|
seq_printf(m, "0x00000010\tMemory Uncorrectable non-fatal\n");
|
|
if (available_error_type & 0x0020)
|
|
seq_printf(m, "0x00000020\tMemory Uncorrectable fatal\n");
|
|
if (available_error_type & 0x0040)
|
|
seq_printf(m, "0x00000040\tPCI Express Correctable\n");
|
|
if (available_error_type & 0x0080)
|
|
seq_printf(m, "0x00000080\tPCI Express Uncorrectable non-fatal\n");
|
|
if (available_error_type & 0x0100)
|
|
seq_printf(m, "0x00000100\tPCI Express Uncorrectable fatal\n");
|
|
if (available_error_type & 0x0200)
|
|
seq_printf(m, "0x00000200\tPlatform Correctable\n");
|
|
if (available_error_type & 0x0400)
|
|
seq_printf(m, "0x00000400\tPlatform Uncorrectable non-fatal\n");
|
|
if (available_error_type & 0x0800)
|
|
seq_printf(m, "0x00000800\tPlatform Uncorrectable fatal\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_SHOW_ATTRIBUTE(available_error_type);
|
|
|
|
static int error_type_get(void *data, u64 *val)
|
|
{
|
|
*val = error_type;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int error_type_set(void *data, u64 val)
|
|
{
|
|
int rc;
|
|
u32 available_error_type = 0;
|
|
u32 tval, vendor;
|
|
|
|
/*
|
|
* Vendor defined types have 0x80000000 bit set, and
|
|
* are not enumerated by ACPI_EINJ_GET_ERROR_TYPE
|
|
*/
|
|
vendor = val & ACPI5_VENDOR_BIT;
|
|
tval = val & 0x7fffffff;
|
|
|
|
/* Only one error type can be specified */
|
|
if (tval & (tval - 1))
|
|
return -EINVAL;
|
|
if (!vendor) {
|
|
rc = einj_get_available_error_type(&available_error_type);
|
|
if (rc)
|
|
return rc;
|
|
if (!(val & available_error_type))
|
|
return -EINVAL;
|
|
}
|
|
error_type = val;
|
|
|
|
return 0;
|
|
}
|
|
|
|
DEFINE_DEBUGFS_ATTRIBUTE(error_type_fops, error_type_get, error_type_set,
|
|
"0x%llx\n");
|
|
|
|
static int error_inject_set(void *data, u64 val)
|
|
{
|
|
if (!error_type)
|
|
return -EINVAL;
|
|
|
|
return einj_error_inject(error_type, error_flags, error_param1, error_param2,
|
|
error_param3, error_param4);
|
|
}
|
|
|
|
DEFINE_DEBUGFS_ATTRIBUTE(error_inject_fops, NULL, error_inject_set, "%llu\n");
|
|
|
|
static int einj_check_table(struct acpi_table_einj *einj_tab)
|
|
{
|
|
if ((einj_tab->header_length !=
|
|
(sizeof(struct acpi_table_einj) - sizeof(einj_tab->header)))
|
|
&& (einj_tab->header_length != sizeof(struct acpi_table_einj)))
|
|
return -EINVAL;
|
|
if (einj_tab->header.length < sizeof(struct acpi_table_einj))
|
|
return -EINVAL;
|
|
if (einj_tab->entries !=
|
|
(einj_tab->header.length - sizeof(struct acpi_table_einj)) /
|
|
sizeof(struct acpi_einj_entry))
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init einj_init(void)
|
|
{
|
|
int rc;
|
|
acpi_status status;
|
|
struct apei_exec_context ctx;
|
|
|
|
if (acpi_disabled) {
|
|
pr_info("ACPI disabled.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
status = acpi_get_table(ACPI_SIG_EINJ, 0,
|
|
(struct acpi_table_header **)&einj_tab);
|
|
if (status == AE_NOT_FOUND) {
|
|
pr_warn("EINJ table not found.\n");
|
|
return -ENODEV;
|
|
}
|
|
else if (ACPI_FAILURE(status)) {
|
|
pr_err("Failed to get EINJ table: %s\n",
|
|
acpi_format_exception(status));
|
|
return -EINVAL;
|
|
}
|
|
|
|
rc = einj_check_table(einj_tab);
|
|
if (rc) {
|
|
pr_warn(FW_BUG "Invalid EINJ table.\n");
|
|
goto err_put_table;
|
|
}
|
|
|
|
rc = -ENOMEM;
|
|
einj_debug_dir = debugfs_create_dir("einj", apei_get_debugfs_dir());
|
|
|
|
debugfs_create_file("available_error_type", S_IRUSR, einj_debug_dir,
|
|
NULL, &available_error_type_fops);
|
|
debugfs_create_file_unsafe("error_type", 0600, einj_debug_dir,
|
|
NULL, &error_type_fops);
|
|
debugfs_create_file_unsafe("error_inject", 0200, einj_debug_dir,
|
|
NULL, &error_inject_fops);
|
|
|
|
apei_resources_init(&einj_resources);
|
|
einj_exec_ctx_init(&ctx);
|
|
rc = apei_exec_collect_resources(&ctx, &einj_resources);
|
|
if (rc) {
|
|
pr_err("Error collecting EINJ resources.\n");
|
|
goto err_fini;
|
|
}
|
|
|
|
rc = apei_resources_request(&einj_resources, "APEI EINJ");
|
|
if (rc) {
|
|
pr_err("Error requesting memory/port resources.\n");
|
|
goto err_fini;
|
|
}
|
|
|
|
rc = apei_exec_pre_map_gars(&ctx);
|
|
if (rc) {
|
|
pr_err("Error pre-mapping GARs.\n");
|
|
goto err_release;
|
|
}
|
|
|
|
einj_param = einj_get_parameter_address();
|
|
if ((param_extension || acpi5) && einj_param) {
|
|
debugfs_create_x32("flags", S_IRUSR | S_IWUSR, einj_debug_dir,
|
|
&error_flags);
|
|
debugfs_create_x64("param1", S_IRUSR | S_IWUSR, einj_debug_dir,
|
|
&error_param1);
|
|
debugfs_create_x64("param2", S_IRUSR | S_IWUSR, einj_debug_dir,
|
|
&error_param2);
|
|
debugfs_create_x64("param3", S_IRUSR | S_IWUSR, einj_debug_dir,
|
|
&error_param3);
|
|
debugfs_create_x64("param4", S_IRUSR | S_IWUSR, einj_debug_dir,
|
|
&error_param4);
|
|
debugfs_create_x32("notrigger", S_IRUSR | S_IWUSR,
|
|
einj_debug_dir, ¬rigger);
|
|
}
|
|
|
|
if (vendor_dev[0]) {
|
|
vendor_blob.data = vendor_dev;
|
|
vendor_blob.size = strlen(vendor_dev);
|
|
debugfs_create_blob("vendor", S_IRUSR, einj_debug_dir,
|
|
&vendor_blob);
|
|
debugfs_create_x32("vendor_flags", S_IRUSR | S_IWUSR,
|
|
einj_debug_dir, &vendor_flags);
|
|
}
|
|
|
|
pr_info("Error INJection is initialized.\n");
|
|
|
|
return 0;
|
|
|
|
err_release:
|
|
apei_resources_release(&einj_resources);
|
|
err_fini:
|
|
apei_resources_fini(&einj_resources);
|
|
debugfs_remove_recursive(einj_debug_dir);
|
|
err_put_table:
|
|
acpi_put_table((struct acpi_table_header *)einj_tab);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static void __exit einj_exit(void)
|
|
{
|
|
struct apei_exec_context ctx;
|
|
|
|
if (einj_param) {
|
|
acpi_size size = (acpi5) ?
|
|
sizeof(struct set_error_type_with_address) :
|
|
sizeof(struct einj_parameter);
|
|
|
|
acpi_os_unmap_iomem(einj_param, size);
|
|
}
|
|
einj_exec_ctx_init(&ctx);
|
|
apei_exec_post_unmap_gars(&ctx);
|
|
apei_resources_release(&einj_resources);
|
|
apei_resources_fini(&einj_resources);
|
|
debugfs_remove_recursive(einj_debug_dir);
|
|
acpi_put_table((struct acpi_table_header *)einj_tab);
|
|
}
|
|
|
|
module_init(einj_init);
|
|
module_exit(einj_exit);
|
|
|
|
MODULE_AUTHOR("Huang Ying");
|
|
MODULE_DESCRIPTION("APEI Error INJection support");
|
|
MODULE_LICENSE("GPL");
|