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![YueHaibing](/assets/img/avatar_default.png)
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20191016141217.21520-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
834 lines
21 KiB
C
834 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Marvell MVEBU pinctrl core driver
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*
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* Authors: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/err.h>
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#include <linux/gpio/driver.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include "pinctrl-mvebu.h"
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#define MPPS_PER_REG 8
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#define MPP_BITS 4
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#define MPP_MASK 0xf
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struct mvebu_pinctrl_function {
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const char *name;
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const char **groups;
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unsigned num_groups;
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};
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struct mvebu_pinctrl_group {
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const char *name;
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const struct mvebu_mpp_ctrl *ctrl;
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struct mvebu_mpp_ctrl_data *data;
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struct mvebu_mpp_ctrl_setting *settings;
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unsigned num_settings;
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unsigned gid;
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unsigned *pins;
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unsigned npins;
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};
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struct mvebu_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctldev;
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struct pinctrl_desc desc;
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struct mvebu_pinctrl_group *groups;
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unsigned num_groups;
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struct mvebu_pinctrl_function *functions;
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unsigned num_functions;
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u8 variant;
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};
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int mvebu_mmio_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data,
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unsigned int pid, unsigned long *config)
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{
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unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
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unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
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*config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK;
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return 0;
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}
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int mvebu_mmio_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data,
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unsigned int pid, unsigned long config)
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{
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unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
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unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
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unsigned long reg;
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reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift);
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writel(reg | (config << shift), data->base + off);
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return 0;
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}
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static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_pid(
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struct mvebu_pinctrl *pctl, unsigned pid)
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{
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unsigned n;
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for (n = 0; n < pctl->num_groups; n++) {
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if (pid >= pctl->groups[n].pins[0] &&
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pid < pctl->groups[n].pins[0] +
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pctl->groups[n].npins)
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return &pctl->groups[n];
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}
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return NULL;
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}
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static struct mvebu_pinctrl_group *mvebu_pinctrl_find_group_by_name(
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struct mvebu_pinctrl *pctl, const char *name)
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{
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unsigned n;
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for (n = 0; n < pctl->num_groups; n++) {
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if (strcmp(name, pctl->groups[n].name) == 0)
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return &pctl->groups[n];
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}
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return NULL;
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}
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static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_val(
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struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
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unsigned long config)
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{
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unsigned n;
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for (n = 0; n < grp->num_settings; n++) {
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if (config == grp->settings[n].val) {
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if (!pctl->variant || (pctl->variant &
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grp->settings[n].variant))
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return &grp->settings[n];
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}
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}
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return NULL;
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}
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static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_setting_by_name(
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struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp,
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const char *name)
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{
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unsigned n;
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for (n = 0; n < grp->num_settings; n++) {
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if (strcmp(name, grp->settings[n].name) == 0) {
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if (!pctl->variant || (pctl->variant &
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grp->settings[n].variant))
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return &grp->settings[n];
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}
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}
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return NULL;
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}
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static struct mvebu_mpp_ctrl_setting *mvebu_pinctrl_find_gpio_setting(
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struct mvebu_pinctrl *pctl, struct mvebu_pinctrl_group *grp)
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{
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unsigned n;
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for (n = 0; n < grp->num_settings; n++) {
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if (grp->settings[n].flags &
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(MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
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if (!pctl->variant || (pctl->variant &
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grp->settings[n].variant))
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return &grp->settings[n];
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}
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}
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return NULL;
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}
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static struct mvebu_pinctrl_function *mvebu_pinctrl_find_function_by_name(
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struct mvebu_pinctrl *pctl, const char *name)
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{
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unsigned n;
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for (n = 0; n < pctl->num_functions; n++) {
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if (strcmp(name, pctl->functions[n].name) == 0)
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return &pctl->functions[n];
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}
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return NULL;
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}
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static int mvebu_pinconf_group_get(struct pinctrl_dev *pctldev,
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unsigned gid, unsigned long *config)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
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if (!grp->ctrl)
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return -EINVAL;
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return grp->ctrl->mpp_get(grp->data, grp->pins[0], config);
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}
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static int mvebu_pinconf_group_set(struct pinctrl_dev *pctldev,
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unsigned gid, unsigned long *configs,
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unsigned num_configs)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
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int i, ret;
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if (!grp->ctrl)
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return -EINVAL;
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for (i = 0; i < num_configs; i++) {
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ret = grp->ctrl->mpp_set(grp->data, grp->pins[0], configs[i]);
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if (ret)
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return ret;
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} /* for each config */
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return 0;
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}
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static void mvebu_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned gid)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
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struct mvebu_mpp_ctrl_setting *curr;
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unsigned long config;
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unsigned n;
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if (mvebu_pinconf_group_get(pctldev, gid, &config))
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return;
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curr = mvebu_pinctrl_find_setting_by_val(pctl, grp, config);
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if (curr) {
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seq_printf(s, "current: %s", curr->name);
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if (curr->subname)
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seq_printf(s, "(%s)", curr->subname);
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if (curr->flags & (MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
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seq_putc(s, '(');
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if (curr->flags & MVEBU_SETTING_GPI)
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seq_putc(s, 'i');
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if (curr->flags & MVEBU_SETTING_GPO)
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seq_putc(s, 'o');
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seq_putc(s, ')');
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}
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} else {
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seq_puts(s, "current: UNKNOWN");
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}
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if (grp->num_settings > 1) {
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seq_puts(s, ", available = [");
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for (n = 0; n < grp->num_settings; n++) {
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if (curr == &grp->settings[n])
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continue;
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/* skip unsupported settings for this variant */
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if (pctl->variant &&
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!(pctl->variant & grp->settings[n].variant))
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continue;
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seq_printf(s, " %s", grp->settings[n].name);
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if (grp->settings[n].subname)
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seq_printf(s, "(%s)", grp->settings[n].subname);
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if (grp->settings[n].flags &
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(MVEBU_SETTING_GPO | MVEBU_SETTING_GPI)) {
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seq_putc(s, '(');
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if (grp->settings[n].flags & MVEBU_SETTING_GPI)
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seq_putc(s, 'i');
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if (grp->settings[n].flags & MVEBU_SETTING_GPO)
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seq_putc(s, 'o');
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seq_putc(s, ')');
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}
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}
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seq_puts(s, " ]");
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}
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}
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static const struct pinconf_ops mvebu_pinconf_ops = {
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.pin_config_group_get = mvebu_pinconf_group_get,
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.pin_config_group_set = mvebu_pinconf_group_set,
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.pin_config_group_dbg_show = mvebu_pinconf_group_dbg_show,
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};
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static int mvebu_pinmux_get_funcs_count(struct pinctrl_dev *pctldev)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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return pctl->num_functions;
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}
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static const char *mvebu_pinmux_get_func_name(struct pinctrl_dev *pctldev,
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unsigned fid)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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return pctl->functions[fid].name;
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}
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static int mvebu_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned fid,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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*groups = pctl->functions[fid].groups;
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*num_groups = pctl->functions[fid].num_groups;
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return 0;
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}
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static int mvebu_pinmux_set(struct pinctrl_dev *pctldev, unsigned fid,
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unsigned gid)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct mvebu_pinctrl_function *func = &pctl->functions[fid];
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struct mvebu_pinctrl_group *grp = &pctl->groups[gid];
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struct mvebu_mpp_ctrl_setting *setting;
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int ret;
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unsigned long config;
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setting = mvebu_pinctrl_find_setting_by_name(pctl, grp,
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func->name);
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if (!setting) {
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dev_err(pctl->dev,
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"unable to find setting %s in group %s\n",
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func->name, func->groups[gid]);
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return -EINVAL;
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}
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config = setting->val;
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ret = mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
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if (ret) {
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dev_err(pctl->dev, "cannot set group %s to %s\n",
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func->groups[gid], func->name);
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return ret;
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}
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return 0;
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}
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static int mvebu_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct mvebu_pinctrl_group *grp;
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struct mvebu_mpp_ctrl_setting *setting;
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unsigned long config;
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grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
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if (!grp)
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return -EINVAL;
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if (grp->ctrl->mpp_gpio_req)
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return grp->ctrl->mpp_gpio_req(grp->data, offset);
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setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
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if (!setting)
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return -ENOTSUPP;
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config = setting->val;
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return mvebu_pinconf_group_set(pctldev, grp->gid, &config, 1);
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}
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static int mvebu_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range, unsigned offset, bool input)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct mvebu_pinctrl_group *grp;
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struct mvebu_mpp_ctrl_setting *setting;
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grp = mvebu_pinctrl_find_group_by_pid(pctl, offset);
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if (!grp)
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return -EINVAL;
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if (grp->ctrl->mpp_gpio_dir)
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return grp->ctrl->mpp_gpio_dir(grp->data, offset, input);
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setting = mvebu_pinctrl_find_gpio_setting(pctl, grp);
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if (!setting)
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return -ENOTSUPP;
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if ((input && (setting->flags & MVEBU_SETTING_GPI)) ||
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(!input && (setting->flags & MVEBU_SETTING_GPO)))
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return 0;
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return -ENOTSUPP;
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}
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static const struct pinmux_ops mvebu_pinmux_ops = {
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.get_functions_count = mvebu_pinmux_get_funcs_count,
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.get_function_name = mvebu_pinmux_get_func_name,
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.get_function_groups = mvebu_pinmux_get_groups,
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.gpio_request_enable = mvebu_pinmux_gpio_request_enable,
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.gpio_set_direction = mvebu_pinmux_gpio_set_direction,
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.set_mux = mvebu_pinmux_set,
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};
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static int mvebu_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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return pctl->num_groups;
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}
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static const char *mvebu_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned gid)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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return pctl->groups[gid].name;
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}
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static int mvebu_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned gid, const unsigned **pins,
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unsigned *num_pins)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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*pins = pctl->groups[gid].pins;
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*num_pins = pctl->groups[gid].npins;
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return 0;
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}
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static int mvebu_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np,
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struct pinctrl_map **map,
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unsigned *num_maps)
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{
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struct mvebu_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
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struct property *prop;
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const char *function;
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const char *group;
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int ret, nmaps, n;
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*map = NULL;
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*num_maps = 0;
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ret = of_property_read_string(np, "marvell,function", &function);
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if (ret) {
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dev_err(pctl->dev,
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"missing marvell,function in node %pOFn\n", np);
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return 0;
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}
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nmaps = of_property_count_strings(np, "marvell,pins");
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if (nmaps < 0) {
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dev_err(pctl->dev,
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"missing marvell,pins in node %pOFn\n", np);
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return 0;
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}
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*map = kmalloc_array(nmaps, sizeof(**map), GFP_KERNEL);
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if (!*map)
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return -ENOMEM;
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n = 0;
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of_property_for_each_string(np, "marvell,pins", prop, group) {
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struct mvebu_pinctrl_group *grp =
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mvebu_pinctrl_find_group_by_name(pctl, group);
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if (!grp) {
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dev_err(pctl->dev, "unknown pin %s", group);
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continue;
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}
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if (!mvebu_pinctrl_find_setting_by_name(pctl, grp, function)) {
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dev_err(pctl->dev, "unsupported function %s on pin %s",
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function, group);
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continue;
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}
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(*map)[n].type = PIN_MAP_TYPE_MUX_GROUP;
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(*map)[n].data.mux.group = group;
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(*map)[n].data.mux.function = function;
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n++;
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}
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*num_maps = nmaps;
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return 0;
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}
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static void mvebu_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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kfree(map);
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}
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static const struct pinctrl_ops mvebu_pinctrl_ops = {
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.get_groups_count = mvebu_pinctrl_get_groups_count,
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.get_group_name = mvebu_pinctrl_get_group_name,
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.get_group_pins = mvebu_pinctrl_get_group_pins,
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.dt_node_to_map = mvebu_pinctrl_dt_node_to_map,
|
|
.dt_free_map = mvebu_pinctrl_dt_free_map,
|
|
};
|
|
|
|
static int _add_function(struct mvebu_pinctrl_function *funcs, int *funcsize,
|
|
const char *name)
|
|
{
|
|
if (*funcsize <= 0)
|
|
return -EOVERFLOW;
|
|
|
|
while (funcs->num_groups) {
|
|
/* function already there */
|
|
if (strcmp(funcs->name, name) == 0) {
|
|
funcs->num_groups++;
|
|
return -EEXIST;
|
|
}
|
|
funcs++;
|
|
}
|
|
|
|
/* append new unique function */
|
|
funcs->name = name;
|
|
funcs->num_groups = 1;
|
|
(*funcsize)--;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mvebu_pinctrl_build_functions(struct platform_device *pdev,
|
|
struct mvebu_pinctrl *pctl)
|
|
{
|
|
struct mvebu_pinctrl_function *funcs;
|
|
int num = 0, funcsize = pctl->desc.npins;
|
|
int n, s;
|
|
|
|
/* we allocate functions for number of pins and hope
|
|
* there are fewer unique functions than pins available */
|
|
funcs = devm_kcalloc(&pdev->dev,
|
|
funcsize, sizeof(struct mvebu_pinctrl_function),
|
|
GFP_KERNEL);
|
|
if (!funcs)
|
|
return -ENOMEM;
|
|
|
|
for (n = 0; n < pctl->num_groups; n++) {
|
|
struct mvebu_pinctrl_group *grp = &pctl->groups[n];
|
|
for (s = 0; s < grp->num_settings; s++) {
|
|
int ret;
|
|
|
|
/* skip unsupported settings on this variant */
|
|
if (pctl->variant &&
|
|
!(pctl->variant & grp->settings[s].variant))
|
|
continue;
|
|
|
|
/* check for unique functions and count groups */
|
|
ret = _add_function(funcs, &funcsize,
|
|
grp->settings[s].name);
|
|
if (ret == -EOVERFLOW)
|
|
dev_err(&pdev->dev,
|
|
"More functions than pins(%d)\n",
|
|
pctl->desc.npins);
|
|
if (ret < 0)
|
|
continue;
|
|
|
|
num++;
|
|
}
|
|
}
|
|
|
|
pctl->num_functions = num;
|
|
pctl->functions = funcs;
|
|
|
|
for (n = 0; n < pctl->num_groups; n++) {
|
|
struct mvebu_pinctrl_group *grp = &pctl->groups[n];
|
|
for (s = 0; s < grp->num_settings; s++) {
|
|
struct mvebu_pinctrl_function *f;
|
|
const char **groups;
|
|
|
|
/* skip unsupported settings on this variant */
|
|
if (pctl->variant &&
|
|
!(pctl->variant & grp->settings[s].variant))
|
|
continue;
|
|
|
|
f = mvebu_pinctrl_find_function_by_name(pctl,
|
|
grp->settings[s].name);
|
|
|
|
/* allocate group name array if not done already */
|
|
if (!f->groups) {
|
|
f->groups = devm_kcalloc(&pdev->dev,
|
|
f->num_groups,
|
|
sizeof(char *),
|
|
GFP_KERNEL);
|
|
if (!f->groups)
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* find next free group name and assign current name */
|
|
groups = f->groups;
|
|
while (*groups)
|
|
groups++;
|
|
*groups = grp->name;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mvebu_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
|
|
struct mvebu_pinctrl *pctl;
|
|
struct pinctrl_pin_desc *pdesc;
|
|
unsigned gid, n, k;
|
|
unsigned size, noname = 0;
|
|
char *noname_buf;
|
|
void *p;
|
|
int ret;
|
|
|
|
if (!soc || !soc->controls || !soc->modes) {
|
|
dev_err(&pdev->dev, "wrong pinctrl soc info\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
pctl = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_pinctrl),
|
|
GFP_KERNEL);
|
|
if (!pctl)
|
|
return -ENOMEM;
|
|
|
|
pctl->desc.name = dev_name(&pdev->dev);
|
|
pctl->desc.owner = THIS_MODULE;
|
|
pctl->desc.pctlops = &mvebu_pinctrl_ops;
|
|
pctl->desc.pmxops = &mvebu_pinmux_ops;
|
|
pctl->desc.confops = &mvebu_pinconf_ops;
|
|
pctl->variant = soc->variant;
|
|
pctl->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, pctl);
|
|
|
|
/* count controls and create names for mvebu generic
|
|
register controls; also does sanity checks */
|
|
pctl->num_groups = 0;
|
|
pctl->desc.npins = 0;
|
|
for (n = 0; n < soc->ncontrols; n++) {
|
|
const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
|
|
|
|
pctl->desc.npins += ctrl->npins;
|
|
/* initialize control's pins[] array */
|
|
for (k = 0; k < ctrl->npins; k++)
|
|
ctrl->pins[k] = ctrl->pid + k;
|
|
|
|
/*
|
|
* We allow to pass controls with NULL name that we treat
|
|
* as a range of one-pin groups with generic mvebu register
|
|
* controls.
|
|
*/
|
|
if (!ctrl->name) {
|
|
pctl->num_groups += ctrl->npins;
|
|
noname += ctrl->npins;
|
|
} else {
|
|
pctl->num_groups += 1;
|
|
}
|
|
}
|
|
|
|
pdesc = devm_kcalloc(&pdev->dev,
|
|
pctl->desc.npins,
|
|
sizeof(struct pinctrl_pin_desc),
|
|
GFP_KERNEL);
|
|
if (!pdesc)
|
|
return -ENOMEM;
|
|
|
|
for (n = 0; n < pctl->desc.npins; n++)
|
|
pdesc[n].number = n;
|
|
pctl->desc.pins = pdesc;
|
|
|
|
/*
|
|
* allocate groups and name buffers for unnamed groups.
|
|
*/
|
|
size = pctl->num_groups * sizeof(*pctl->groups) + noname * 8;
|
|
p = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
|
|
if (!p)
|
|
return -ENOMEM;
|
|
|
|
pctl->groups = p;
|
|
noname_buf = p + pctl->num_groups * sizeof(*pctl->groups);
|
|
|
|
/* assign mpp controls to groups */
|
|
gid = 0;
|
|
for (n = 0; n < soc->ncontrols; n++) {
|
|
const struct mvebu_mpp_ctrl *ctrl = &soc->controls[n];
|
|
struct mvebu_mpp_ctrl_data *data = soc->control_data ?
|
|
&soc->control_data[n] : NULL;
|
|
|
|
pctl->groups[gid].gid = gid;
|
|
pctl->groups[gid].ctrl = ctrl;
|
|
pctl->groups[gid].data = data;
|
|
pctl->groups[gid].name = ctrl->name;
|
|
pctl->groups[gid].pins = ctrl->pins;
|
|
pctl->groups[gid].npins = ctrl->npins;
|
|
|
|
/*
|
|
* We treat unnamed controls as a range of one-pin groups
|
|
* with generic mvebu register controls. Use one group for
|
|
* each in this range and assign a default group name.
|
|
*/
|
|
if (!ctrl->name) {
|
|
pctl->groups[gid].name = noname_buf;
|
|
pctl->groups[gid].npins = 1;
|
|
sprintf(noname_buf, "mpp%d", ctrl->pid+0);
|
|
noname_buf += 8;
|
|
|
|
for (k = 1; k < ctrl->npins; k++) {
|
|
gid++;
|
|
pctl->groups[gid].gid = gid;
|
|
pctl->groups[gid].ctrl = ctrl;
|
|
pctl->groups[gid].data = data;
|
|
pctl->groups[gid].name = noname_buf;
|
|
pctl->groups[gid].pins = &ctrl->pins[k];
|
|
pctl->groups[gid].npins = 1;
|
|
sprintf(noname_buf, "mpp%d", ctrl->pid+k);
|
|
noname_buf += 8;
|
|
}
|
|
}
|
|
gid++;
|
|
}
|
|
|
|
/* assign mpp modes to groups */
|
|
for (n = 0; n < soc->nmodes; n++) {
|
|
struct mvebu_mpp_mode *mode = &soc->modes[n];
|
|
struct mvebu_mpp_ctrl_setting *set = &mode->settings[0];
|
|
struct mvebu_pinctrl_group *grp;
|
|
unsigned num_settings;
|
|
unsigned supp_settings;
|
|
|
|
for (num_settings = 0, supp_settings = 0; ; set++) {
|
|
if (!set->name)
|
|
break;
|
|
|
|
num_settings++;
|
|
|
|
/* skip unsupported settings for this variant */
|
|
if (pctl->variant && !(pctl->variant & set->variant))
|
|
continue;
|
|
|
|
supp_settings++;
|
|
|
|
/* find gpio/gpo/gpi settings */
|
|
if (strcmp(set->name, "gpio") == 0)
|
|
set->flags = MVEBU_SETTING_GPI |
|
|
MVEBU_SETTING_GPO;
|
|
else if (strcmp(set->name, "gpo") == 0)
|
|
set->flags = MVEBU_SETTING_GPO;
|
|
else if (strcmp(set->name, "gpi") == 0)
|
|
set->flags = MVEBU_SETTING_GPI;
|
|
}
|
|
|
|
/* skip modes with no settings for this variant */
|
|
if (!supp_settings)
|
|
continue;
|
|
|
|
grp = mvebu_pinctrl_find_group_by_pid(pctl, mode->pid);
|
|
if (!grp) {
|
|
dev_warn(&pdev->dev, "unknown pinctrl group %d\n",
|
|
mode->pid);
|
|
continue;
|
|
}
|
|
|
|
grp->settings = mode->settings;
|
|
grp->num_settings = num_settings;
|
|
}
|
|
|
|
ret = mvebu_pinctrl_build_functions(pdev, pctl);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "unable to build functions\n");
|
|
return ret;
|
|
}
|
|
|
|
pctl->pctldev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl);
|
|
if (IS_ERR(pctl->pctldev)) {
|
|
dev_err(&pdev->dev, "unable to register pinctrl driver\n");
|
|
return PTR_ERR(pctl->pctldev);
|
|
}
|
|
|
|
dev_info(&pdev->dev, "registered pinctrl driver\n");
|
|
|
|
/* register gpio ranges */
|
|
for (n = 0; n < soc->ngpioranges; n++)
|
|
pinctrl_add_gpio_range(pctl->pctldev, &soc->gpioranges[n]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* mvebu_pinctrl_simple_mmio_probe - probe a simple mmio pinctrl
|
|
* @pdev: platform device (with platform data already attached)
|
|
*
|
|
* Initialise a simple (single base address) mmio pinctrl driver,
|
|
* assigning the MMIO base address to all mvebu mpp ctrl instances.
|
|
*/
|
|
int mvebu_pinctrl_simple_mmio_probe(struct platform_device *pdev)
|
|
{
|
|
struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
|
|
struct mvebu_mpp_ctrl_data *mpp_data;
|
|
void __iomem *base;
|
|
int i;
|
|
|
|
base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(base))
|
|
return PTR_ERR(base);
|
|
|
|
mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data),
|
|
GFP_KERNEL);
|
|
if (!mpp_data)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < soc->ncontrols; i++)
|
|
mpp_data[i].base = base;
|
|
|
|
soc->control_data = mpp_data;
|
|
|
|
return mvebu_pinctrl_probe(pdev);
|
|
}
|
|
|
|
int mvebu_regmap_mpp_ctrl_get(struct mvebu_mpp_ctrl_data *data,
|
|
unsigned int pid, unsigned long *config)
|
|
{
|
|
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
|
|
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
|
|
unsigned int val;
|
|
int err;
|
|
|
|
err = regmap_read(data->regmap.map, data->regmap.offset + off, &val);
|
|
if (err)
|
|
return err;
|
|
|
|
*config = (val >> shift) & MVEBU_MPP_MASK;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mvebu_regmap_mpp_ctrl_set(struct mvebu_mpp_ctrl_data *data,
|
|
unsigned int pid, unsigned long config)
|
|
{
|
|
unsigned off = (pid / MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
|
|
unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS;
|
|
|
|
return regmap_update_bits(data->regmap.map, data->regmap.offset + off,
|
|
MVEBU_MPP_MASK << shift, config << shift);
|
|
}
|
|
|
|
int mvebu_pinctrl_simple_regmap_probe(struct platform_device *pdev,
|
|
struct device *syscon_dev, u32 offset)
|
|
{
|
|
struct mvebu_pinctrl_soc_info *soc = dev_get_platdata(&pdev->dev);
|
|
struct mvebu_mpp_ctrl_data *mpp_data;
|
|
struct regmap *regmap;
|
|
int i;
|
|
|
|
regmap = syscon_node_to_regmap(syscon_dev->of_node);
|
|
if (IS_ERR(regmap))
|
|
return PTR_ERR(regmap);
|
|
|
|
mpp_data = devm_kcalloc(&pdev->dev, soc->ncontrols, sizeof(*mpp_data),
|
|
GFP_KERNEL);
|
|
if (!mpp_data)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < soc->ncontrols; i++) {
|
|
mpp_data[i].regmap.map = regmap;
|
|
mpp_data[i].regmap.offset = offset;
|
|
}
|
|
|
|
soc->control_data = mpp_data;
|
|
|
|
return mvebu_pinctrl_probe(pdev);
|
|
}
|