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![]() Add a reset controller to PolarFire SoC's clock driver. This reset controller is registered as an aux device and read/write functions exported to the drivers namespace so that the reset controller can access the peripheral device reset register. Reviewed-by: Daire McNamara <daire.mcnamara@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220909123123.2699583-5-conor.dooley@microchip.com |
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arc | ||
at91 | ||
bcm2835 | ||
canaan | ||
fsl | ||
imx | ||
mediatek | ||
microchip | ||
mscc | ||
qcom | ||
rockchip | ||
sa1100 | ||
sifive | ||
tegra |