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1650e8a881
We use variable 'irq' to store the return value of fwnode_get_irq_byname(). A negative value indicates that the operation failed. If the type of 'irq' is unsigned int, we never know if the operation failed. Reported-by: Harshit Mogalapalli <harshit.m.mogalapalli@oracle.com> Closes: https://lore.kernel.org/loongarch/325dd825-6fa5-0ebc-4b7e-7acf2d2840e4@loongson.cn/ Signed-off-by: YingKun Meng <mengyingkun@loongson.cn> Link: https://lore.kernel.org/r/20230619074649.3608726-1-mengyingkun@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
71 lines
2.1 KiB
C
71 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* ALSA I2S interface for the Loongson platform
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*
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* Copyright (C) 2023 Loongson Technology Corporation Limited
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* Author: Yingkun Meng <mengyingkun@loongson.cn>
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*/
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#ifndef _LOONGSON_I2S_H
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#define _LOONGSON_I2S_H
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#include <linux/regmap.h>
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#include <sound/dmaengine_pcm.h>
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/* I2S Common Registers */
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#define LS_I2S_VER 0x00 /* I2S Version */
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#define LS_I2S_CFG 0x04 /* I2S Config */
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#define LS_I2S_CTRL 0x08 /* I2S Control */
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#define LS_I2S_RX_DATA 0x0C /* I2S DMA RX Address */
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#define LS_I2S_TX_DATA 0x10 /* I2S DMA TX Address */
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/* 2K2000 I2S Specify Registers */
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#define LS_I2S_CFG1 0x14 /* I2S Config1 */
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/* 7A2000 I2S Specify Registers */
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#define LS_I2S_TX_ORDER 0x100 /* TX DMA Order */
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#define LS_I2S_RX_ORDER 0x110 /* RX DMA Order */
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/* Loongson I2S Control Register */
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#define I2S_CTRL_MCLK_READY (1 << 16) /* MCLK ready */
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#define I2S_CTRL_MASTER (1 << 15) /* Master mode */
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#define I2S_CTRL_MSB (1 << 14) /* MSB bit order */
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#define I2S_CTRL_RX_EN (1 << 13) /* RX enable */
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#define I2S_CTRL_TX_EN (1 << 12) /* TX enable */
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#define I2S_CTRL_RX_DMA_EN (1 << 11) /* DMA RX enable */
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#define I2S_CTRL_CLK_READY (1 << 8) /* BCLK ready */
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#define I2S_CTRL_TX_DMA_EN (1 << 7) /* DMA TX enable */
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#define I2S_CTRL_RESET (1 << 4) /* Controller soft reset */
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#define I2S_CTRL_MCLK_EN (1 << 3) /* Enable MCLK */
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#define I2S_CTRL_RX_INT_EN (1 << 1) /* RX interrupt enable */
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#define I2S_CTRL_TX_INT_EN (1 << 0) /* TX interrupt enable */
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#define LS_I2S_DRVNAME "loongson-i2s"
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struct loongson_dma_data {
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dma_addr_t dev_addr; /* device physical address for DMA */
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void __iomem *order_addr; /* DMA order register */
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int irq; /* DMA irq */
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};
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struct loongson_i2s {
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struct device *dev;
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union {
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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struct loongson_dma_data tx_dma_data;
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};
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union {
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct loongson_dma_data rx_dma_data;
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};
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struct regmap *regmap;
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void __iomem *reg_base;
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u32 rev_id;
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u32 clk_rate;
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u32 sysclk;
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};
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extern const struct dev_pm_ops loongson_i2s_pm;
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extern struct snd_soc_dai_driver loongson_i2s_dai;
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#endif
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