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80c4ece67b
Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on RZ/G2L (and alike) SoC's so that these can be used in the first cell of interrupt specifiers. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
25 lines
550 B
C
25 lines
550 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* This header provides constants for Renesas RZ/G2L family IRQC bindings.
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*
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* Copyright (C) 2022 Renesas Electronics Corp.
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*
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*/
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#ifndef __DT_BINDINGS_IRQC_RZG2L_H
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#define __DT_BINDINGS_IRQC_RZG2L_H
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/* NMI maps to SPI0 */
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#define RZG2L_NMI 0
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/* IRQ0-7 map to SPI1-8 */
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#define RZG2L_IRQ0 1
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#define RZG2L_IRQ1 2
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#define RZG2L_IRQ2 3
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#define RZG2L_IRQ3 4
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#define RZG2L_IRQ4 5
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#define RZG2L_IRQ5 6
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#define RZG2L_IRQ6 7
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#define RZG2L_IRQ7 8
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#endif /* __DT_BINDINGS_IRQC_RZG2L_H */
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