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![Mika Westerberg](/assets/img/avatar_default.png)
Starting from Intel Falcon Ridge the internal connection manager running on the Thunderbolt host controller has been supporting 4 security levels. One reason for this is to prevent DMA attacks and only allow connecting devices the user trusts. The internal connection manager (ICM) is the preferred way of connecting Thunderbolt devices over software only implementation typically used on Macs. The driver communicates with ICM using special Thunderbolt ring 0 (control channel) messages. In order to handle these messages we add support for the ICM messages to the control channel. The security levels are as follows: none - No security, all tunnels are created automatically user - User needs to approve the device before tunnels are created secure - User need to approve the device before tunnels are created. The device is sent a challenge on future connects to be able to verify it is actually the approved device. dponly - Only Display Port and USB tunnels can be created and those are created automatically. The security levels are typically configurable from the system BIOS and by default it is set to "user" on many systems. In this patch each Thunderbolt device will have either one or two new sysfs attributes: authorized and key. The latter appears for devices that support secure connect. In order to identify the device the user can read identication information, including UUID and name of the device from sysfs and based on that make a decision to authorize the device. The device is authorized by simply writing 1 to the "authorized" sysfs attribute. This is following the USB bus device authorization mechanism. The secure connect requires an additional challenge step (writing 2 to the "authorized" attribute) in future connects when the key has already been stored to the NVM of the device. Non-ICM systems (before Alpine Ridge) continue to use the existing functionality and the security level is set to none. For systems with Alpine Ridge, even on Apple hardware, we will use ICM. This code is based on the work done by Amir Levy and Michael Jamet. Signed-off-by: Michael Jamet <michael.jamet@intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Yehezkel Bernat <yehezkel.bernat@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Andreas Noever <andreas.noever@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
930 lines
23 KiB
C
930 lines
23 KiB
C
/*
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* Thunderbolt Cactus Ridge driver - NHI driver
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*
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* The NHI (native host interface) is the pci device that allows us to send and
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* receive frames from the thunderbolt bus.
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*
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* Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
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*/
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include "nhi.h"
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#include "nhi_regs.h"
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#include "tb.h"
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#define RING_TYPE(ring) ((ring)->is_tx ? "TX ring" : "RX ring")
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/*
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* Minimal number of vectors when we use MSI-X. Two for control channel
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* Rx/Tx and the rest four are for cross domain DMA paths.
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*/
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#define MSIX_MIN_VECS 6
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#define MSIX_MAX_VECS 16
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#define NHI_MAILBOX_TIMEOUT 500 /* ms */
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static int ring_interrupt_index(struct tb_ring *ring)
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{
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int bit = ring->hop;
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if (!ring->is_tx)
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bit += ring->nhi->hop_count;
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return bit;
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}
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/**
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* ring_interrupt_active() - activate/deactivate interrupts for a single ring
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*
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* ring->nhi->lock must be held.
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*/
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static void ring_interrupt_active(struct tb_ring *ring, bool active)
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{
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int reg = REG_RING_INTERRUPT_BASE +
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ring_interrupt_index(ring) / 32 * 4;
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int bit = ring_interrupt_index(ring) & 31;
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int mask = 1 << bit;
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u32 old, new;
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if (ring->irq > 0) {
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u32 step, shift, ivr, misc;
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void __iomem *ivr_base;
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int index;
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if (ring->is_tx)
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index = ring->hop;
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else
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index = ring->hop + ring->nhi->hop_count;
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/*
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* Ask the hardware to clear interrupt status bits automatically
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* since we already know which interrupt was triggered.
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*/
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misc = ioread32(ring->nhi->iobase + REG_DMA_MISC);
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if (!(misc & REG_DMA_MISC_INT_AUTO_CLEAR)) {
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misc |= REG_DMA_MISC_INT_AUTO_CLEAR;
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iowrite32(misc, ring->nhi->iobase + REG_DMA_MISC);
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}
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ivr_base = ring->nhi->iobase + REG_INT_VEC_ALLOC_BASE;
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step = index / REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
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shift = index % REG_INT_VEC_ALLOC_REGS * REG_INT_VEC_ALLOC_BITS;
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ivr = ioread32(ivr_base + step);
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ivr &= ~(REG_INT_VEC_ALLOC_MASK << shift);
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if (active)
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ivr |= ring->vector << shift;
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iowrite32(ivr, ivr_base + step);
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}
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old = ioread32(ring->nhi->iobase + reg);
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if (active)
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new = old | mask;
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else
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new = old & ~mask;
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dev_info(&ring->nhi->pdev->dev,
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"%s interrupt at register %#x bit %d (%#x -> %#x)\n",
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active ? "enabling" : "disabling", reg, bit, old, new);
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if (new == old)
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dev_WARN(&ring->nhi->pdev->dev,
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"interrupt for %s %d is already %s\n",
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RING_TYPE(ring), ring->hop,
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active ? "enabled" : "disabled");
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iowrite32(new, ring->nhi->iobase + reg);
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}
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/**
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* nhi_disable_interrupts() - disable interrupts for all rings
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*
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* Use only during init and shutdown.
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*/
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static void nhi_disable_interrupts(struct tb_nhi *nhi)
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{
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int i = 0;
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/* disable interrupts */
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for (i = 0; i < RING_INTERRUPT_REG_COUNT(nhi); i++)
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iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i);
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/* clear interrupt status bits */
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for (i = 0; i < RING_NOTIFY_REG_COUNT(nhi); i++)
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ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i);
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}
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/* ring helper methods */
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static void __iomem *ring_desc_base(struct tb_ring *ring)
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{
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void __iomem *io = ring->nhi->iobase;
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io += ring->is_tx ? REG_TX_RING_BASE : REG_RX_RING_BASE;
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io += ring->hop * 16;
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return io;
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}
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static void __iomem *ring_options_base(struct tb_ring *ring)
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{
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void __iomem *io = ring->nhi->iobase;
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io += ring->is_tx ? REG_TX_OPTIONS_BASE : REG_RX_OPTIONS_BASE;
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io += ring->hop * 32;
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return io;
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}
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static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset)
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{
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iowrite16(value, ring_desc_base(ring) + offset);
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}
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static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset)
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{
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iowrite32(value, ring_desc_base(ring) + offset);
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}
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static void ring_iowrite64desc(struct tb_ring *ring, u64 value, u32 offset)
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{
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iowrite32(value, ring_desc_base(ring) + offset);
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iowrite32(value >> 32, ring_desc_base(ring) + offset + 4);
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}
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static void ring_iowrite32options(struct tb_ring *ring, u32 value, u32 offset)
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{
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iowrite32(value, ring_options_base(ring) + offset);
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}
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static bool ring_full(struct tb_ring *ring)
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{
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return ((ring->head + 1) % ring->size) == ring->tail;
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}
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static bool ring_empty(struct tb_ring *ring)
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{
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return ring->head == ring->tail;
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}
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/**
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* ring_write_descriptors() - post frames from ring->queue to the controller
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*
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* ring->lock is held.
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*/
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static void ring_write_descriptors(struct tb_ring *ring)
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{
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struct ring_frame *frame, *n;
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struct ring_desc *descriptor;
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list_for_each_entry_safe(frame, n, &ring->queue, list) {
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if (ring_full(ring))
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break;
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list_move_tail(&frame->list, &ring->in_flight);
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descriptor = &ring->descriptors[ring->head];
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descriptor->phys = frame->buffer_phy;
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descriptor->time = 0;
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descriptor->flags = RING_DESC_POSTED | RING_DESC_INTERRUPT;
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if (ring->is_tx) {
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descriptor->length = frame->size;
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descriptor->eof = frame->eof;
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descriptor->sof = frame->sof;
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}
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ring->head = (ring->head + 1) % ring->size;
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ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8);
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}
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}
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/**
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* ring_work() - progress completed frames
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*
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* If the ring is shutting down then all frames are marked as canceled and
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* their callbacks are invoked.
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*
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* Otherwise we collect all completed frame from the ring buffer, write new
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* frame to the ring buffer and invoke the callbacks for the completed frames.
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*/
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static void ring_work(struct work_struct *work)
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{
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struct tb_ring *ring = container_of(work, typeof(*ring), work);
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struct ring_frame *frame;
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bool canceled = false;
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LIST_HEAD(done);
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mutex_lock(&ring->lock);
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if (!ring->running) {
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/* Move all frames to done and mark them as canceled. */
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list_splice_tail_init(&ring->in_flight, &done);
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list_splice_tail_init(&ring->queue, &done);
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canceled = true;
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goto invoke_callback;
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}
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while (!ring_empty(ring)) {
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if (!(ring->descriptors[ring->tail].flags
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& RING_DESC_COMPLETED))
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break;
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frame = list_first_entry(&ring->in_flight, typeof(*frame),
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list);
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list_move_tail(&frame->list, &done);
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if (!ring->is_tx) {
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frame->size = ring->descriptors[ring->tail].length;
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frame->eof = ring->descriptors[ring->tail].eof;
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frame->sof = ring->descriptors[ring->tail].sof;
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frame->flags = ring->descriptors[ring->tail].flags;
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if (frame->sof != 0)
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dev_WARN(&ring->nhi->pdev->dev,
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"%s %d got unexpected SOF: %#x\n",
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RING_TYPE(ring), ring->hop,
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frame->sof);
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/*
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* known flags:
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* raw not enabled, interupt not set: 0x2=0010
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* raw enabled: 0xa=1010
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* raw not enabled: 0xb=1011
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* partial frame (>MAX_FRAME_SIZE): 0xe=1110
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*/
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if (frame->flags != 0xa)
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dev_WARN(&ring->nhi->pdev->dev,
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"%s %d got unexpected flags: %#x\n",
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RING_TYPE(ring), ring->hop,
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frame->flags);
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}
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ring->tail = (ring->tail + 1) % ring->size;
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}
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ring_write_descriptors(ring);
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invoke_callback:
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mutex_unlock(&ring->lock); /* allow callbacks to schedule new work */
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while (!list_empty(&done)) {
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frame = list_first_entry(&done, typeof(*frame), list);
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/*
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* The callback may reenqueue or delete frame.
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* Do not hold on to it.
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*/
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list_del_init(&frame->list);
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frame->callback(ring, frame, canceled);
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}
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}
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int __ring_enqueue(struct tb_ring *ring, struct ring_frame *frame)
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{
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int ret = 0;
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mutex_lock(&ring->lock);
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if (ring->running) {
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list_add_tail(&frame->list, &ring->queue);
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ring_write_descriptors(ring);
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} else {
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ret = -ESHUTDOWN;
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}
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mutex_unlock(&ring->lock);
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return ret;
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}
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static irqreturn_t ring_msix(int irq, void *data)
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{
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struct tb_ring *ring = data;
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schedule_work(&ring->work);
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return IRQ_HANDLED;
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}
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static int ring_request_msix(struct tb_ring *ring, bool no_suspend)
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{
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struct tb_nhi *nhi = ring->nhi;
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unsigned long irqflags;
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int ret;
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if (!nhi->pdev->msix_enabled)
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return 0;
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ret = ida_simple_get(&nhi->msix_ida, 0, MSIX_MAX_VECS, GFP_KERNEL);
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if (ret < 0)
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return ret;
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ring->vector = ret;
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ring->irq = pci_irq_vector(ring->nhi->pdev, ring->vector);
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if (ring->irq < 0)
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return ring->irq;
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irqflags = no_suspend ? IRQF_NO_SUSPEND : 0;
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return request_irq(ring->irq, ring_msix, irqflags, "thunderbolt", ring);
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}
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static void ring_release_msix(struct tb_ring *ring)
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{
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if (ring->irq <= 0)
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return;
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free_irq(ring->irq, ring);
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ida_simple_remove(&ring->nhi->msix_ida, ring->vector);
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ring->vector = 0;
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ring->irq = 0;
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}
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static struct tb_ring *ring_alloc(struct tb_nhi *nhi, u32 hop, int size,
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bool transmit, unsigned int flags)
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{
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struct tb_ring *ring = NULL;
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dev_info(&nhi->pdev->dev, "allocating %s ring %d of size %d\n",
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transmit ? "TX" : "RX", hop, size);
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mutex_lock(&nhi->lock);
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if (hop >= nhi->hop_count) {
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dev_WARN(&nhi->pdev->dev, "invalid hop: %d\n", hop);
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goto err;
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}
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if (transmit && nhi->tx_rings[hop]) {
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dev_WARN(&nhi->pdev->dev, "TX hop %d already allocated\n", hop);
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goto err;
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} else if (!transmit && nhi->rx_rings[hop]) {
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dev_WARN(&nhi->pdev->dev, "RX hop %d already allocated\n", hop);
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goto err;
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}
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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if (!ring)
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goto err;
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mutex_init(&ring->lock);
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INIT_LIST_HEAD(&ring->queue);
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INIT_LIST_HEAD(&ring->in_flight);
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INIT_WORK(&ring->work, ring_work);
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ring->nhi = nhi;
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ring->hop = hop;
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ring->is_tx = transmit;
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ring->size = size;
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ring->flags = flags;
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ring->head = 0;
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ring->tail = 0;
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ring->running = false;
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if (ring_request_msix(ring, flags & RING_FLAG_NO_SUSPEND))
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goto err;
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ring->descriptors = dma_alloc_coherent(&ring->nhi->pdev->dev,
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size * sizeof(*ring->descriptors),
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&ring->descriptors_dma, GFP_KERNEL | __GFP_ZERO);
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if (!ring->descriptors)
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goto err;
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if (transmit)
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nhi->tx_rings[hop] = ring;
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else
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nhi->rx_rings[hop] = ring;
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mutex_unlock(&nhi->lock);
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return ring;
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err:
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if (ring)
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mutex_destroy(&ring->lock);
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kfree(ring);
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mutex_unlock(&nhi->lock);
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return NULL;
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}
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struct tb_ring *ring_alloc_tx(struct tb_nhi *nhi, int hop, int size,
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unsigned int flags)
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{
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return ring_alloc(nhi, hop, size, true, flags);
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}
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struct tb_ring *ring_alloc_rx(struct tb_nhi *nhi, int hop, int size,
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unsigned int flags)
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{
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return ring_alloc(nhi, hop, size, false, flags);
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}
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/**
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* ring_start() - enable a ring
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*
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* Must not be invoked in parallel with ring_stop().
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*/
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void ring_start(struct tb_ring *ring)
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{
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mutex_lock(&ring->nhi->lock);
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mutex_lock(&ring->lock);
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if (ring->nhi->going_away)
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goto err;
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if (ring->running) {
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dev_WARN(&ring->nhi->pdev->dev, "ring already started\n");
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goto err;
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}
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dev_info(&ring->nhi->pdev->dev, "starting %s %d\n",
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RING_TYPE(ring), ring->hop);
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ring_iowrite64desc(ring, ring->descriptors_dma, 0);
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if (ring->is_tx) {
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ring_iowrite32desc(ring, ring->size, 12);
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ring_iowrite32options(ring, 0, 4); /* time releated ? */
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ring_iowrite32options(ring,
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RING_FLAG_ENABLE | RING_FLAG_RAW, 0);
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} else {
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ring_iowrite32desc(ring,
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(TB_FRAME_SIZE << 16) | ring->size, 12);
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ring_iowrite32options(ring, 0xffffffff, 4); /* SOF EOF mask */
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ring_iowrite32options(ring,
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RING_FLAG_ENABLE | RING_FLAG_RAW, 0);
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}
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ring_interrupt_active(ring, true);
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ring->running = true;
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err:
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mutex_unlock(&ring->lock);
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mutex_unlock(&ring->nhi->lock);
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}
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/**
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* ring_stop() - shutdown a ring
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*
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* Must not be invoked from a callback.
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*
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* This method will disable the ring. Further calls to ring_tx/ring_rx will
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* return -ESHUTDOWN until ring_stop has been called.
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*
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* All enqueued frames will be canceled and their callbacks will be executed
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* with frame->canceled set to true (on the callback thread). This method
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* returns only after all callback invocations have finished.
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*/
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void ring_stop(struct tb_ring *ring)
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{
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mutex_lock(&ring->nhi->lock);
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mutex_lock(&ring->lock);
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dev_info(&ring->nhi->pdev->dev, "stopping %s %d\n",
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RING_TYPE(ring), ring->hop);
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if (ring->nhi->going_away)
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goto err;
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if (!ring->running) {
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dev_WARN(&ring->nhi->pdev->dev, "%s %d already stopped\n",
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RING_TYPE(ring), ring->hop);
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goto err;
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}
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ring_interrupt_active(ring, false);
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ring_iowrite32options(ring, 0, 0);
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ring_iowrite64desc(ring, 0, 0);
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ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8);
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ring_iowrite32desc(ring, 0, 12);
|
|
ring->head = 0;
|
|
ring->tail = 0;
|
|
ring->running = false;
|
|
|
|
err:
|
|
mutex_unlock(&ring->lock);
|
|
mutex_unlock(&ring->nhi->lock);
|
|
|
|
/*
|
|
* schedule ring->work to invoke callbacks on all remaining frames.
|
|
*/
|
|
schedule_work(&ring->work);
|
|
flush_work(&ring->work);
|
|
}
|
|
|
|
/*
|
|
* ring_free() - free ring
|
|
*
|
|
* When this method returns all invocations of ring->callback will have
|
|
* finished.
|
|
*
|
|
* Ring must be stopped.
|
|
*
|
|
* Must NOT be called from ring_frame->callback!
|
|
*/
|
|
void ring_free(struct tb_ring *ring)
|
|
{
|
|
mutex_lock(&ring->nhi->lock);
|
|
/*
|
|
* Dissociate the ring from the NHI. This also ensures that
|
|
* nhi_interrupt_work cannot reschedule ring->work.
|
|
*/
|
|
if (ring->is_tx)
|
|
ring->nhi->tx_rings[ring->hop] = NULL;
|
|
else
|
|
ring->nhi->rx_rings[ring->hop] = NULL;
|
|
|
|
if (ring->running) {
|
|
dev_WARN(&ring->nhi->pdev->dev, "%s %d still running\n",
|
|
RING_TYPE(ring), ring->hop);
|
|
}
|
|
|
|
ring_release_msix(ring);
|
|
|
|
dma_free_coherent(&ring->nhi->pdev->dev,
|
|
ring->size * sizeof(*ring->descriptors),
|
|
ring->descriptors, ring->descriptors_dma);
|
|
|
|
ring->descriptors = NULL;
|
|
ring->descriptors_dma = 0;
|
|
|
|
|
|
dev_info(&ring->nhi->pdev->dev,
|
|
"freeing %s %d\n",
|
|
RING_TYPE(ring),
|
|
ring->hop);
|
|
|
|
mutex_unlock(&ring->nhi->lock);
|
|
/**
|
|
* ring->work can no longer be scheduled (it is scheduled only
|
|
* by nhi_interrupt_work, ring_stop and ring_msix). Wait for it
|
|
* to finish before freeing the ring.
|
|
*/
|
|
flush_work(&ring->work);
|
|
mutex_destroy(&ring->lock);
|
|
kfree(ring);
|
|
}
|
|
|
|
/**
|
|
* nhi_mailbox_cmd() - Send a command through NHI mailbox
|
|
* @nhi: Pointer to the NHI structure
|
|
* @cmd: Command to send
|
|
* @data: Data to be send with the command
|
|
*
|
|
* Sends mailbox command to the firmware running on NHI. Returns %0 in
|
|
* case of success and negative errno in case of failure.
|
|
*/
|
|
int nhi_mailbox_cmd(struct tb_nhi *nhi, enum nhi_mailbox_cmd cmd, u32 data)
|
|
{
|
|
ktime_t timeout;
|
|
u32 val;
|
|
|
|
iowrite32(data, nhi->iobase + REG_INMAIL_DATA);
|
|
|
|
val = ioread32(nhi->iobase + REG_INMAIL_CMD);
|
|
val &= ~(REG_INMAIL_CMD_MASK | REG_INMAIL_ERROR);
|
|
val |= REG_INMAIL_OP_REQUEST | cmd;
|
|
iowrite32(val, nhi->iobase + REG_INMAIL_CMD);
|
|
|
|
timeout = ktime_add_ms(ktime_get(), NHI_MAILBOX_TIMEOUT);
|
|
do {
|
|
val = ioread32(nhi->iobase + REG_INMAIL_CMD);
|
|
if (!(val & REG_INMAIL_OP_REQUEST))
|
|
break;
|
|
usleep_range(10, 20);
|
|
} while (ktime_before(ktime_get(), timeout));
|
|
|
|
if (val & REG_INMAIL_OP_REQUEST)
|
|
return -ETIMEDOUT;
|
|
if (val & REG_INMAIL_ERROR)
|
|
return -EIO;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* nhi_mailbox_mode() - Return current firmware operation mode
|
|
* @nhi: Pointer to the NHI structure
|
|
*
|
|
* The function reads current firmware operation mode using NHI mailbox
|
|
* registers and returns it to the caller.
|
|
*/
|
|
enum nhi_fw_mode nhi_mailbox_mode(struct tb_nhi *nhi)
|
|
{
|
|
u32 val;
|
|
|
|
val = ioread32(nhi->iobase + REG_OUTMAIL_CMD);
|
|
val &= REG_OUTMAIL_CMD_OPMODE_MASK;
|
|
val >>= REG_OUTMAIL_CMD_OPMODE_SHIFT;
|
|
|
|
return (enum nhi_fw_mode)val;
|
|
}
|
|
|
|
static void nhi_interrupt_work(struct work_struct *work)
|
|
{
|
|
struct tb_nhi *nhi = container_of(work, typeof(*nhi), interrupt_work);
|
|
int value = 0; /* Suppress uninitialized usage warning. */
|
|
int bit;
|
|
int hop = -1;
|
|
int type = 0; /* current interrupt type 0: TX, 1: RX, 2: RX overflow */
|
|
struct tb_ring *ring;
|
|
|
|
mutex_lock(&nhi->lock);
|
|
|
|
/*
|
|
* Starting at REG_RING_NOTIFY_BASE there are three status bitfields
|
|
* (TX, RX, RX overflow). We iterate over the bits and read a new
|
|
* dwords as required. The registers are cleared on read.
|
|
*/
|
|
for (bit = 0; bit < 3 * nhi->hop_count; bit++) {
|
|
if (bit % 32 == 0)
|
|
value = ioread32(nhi->iobase
|
|
+ REG_RING_NOTIFY_BASE
|
|
+ 4 * (bit / 32));
|
|
if (++hop == nhi->hop_count) {
|
|
hop = 0;
|
|
type++;
|
|
}
|
|
if ((value & (1 << (bit % 32))) == 0)
|
|
continue;
|
|
if (type == 2) {
|
|
dev_warn(&nhi->pdev->dev,
|
|
"RX overflow for ring %d\n",
|
|
hop);
|
|
continue;
|
|
}
|
|
if (type == 0)
|
|
ring = nhi->tx_rings[hop];
|
|
else
|
|
ring = nhi->rx_rings[hop];
|
|
if (ring == NULL) {
|
|
dev_warn(&nhi->pdev->dev,
|
|
"got interrupt for inactive %s ring %d\n",
|
|
type ? "RX" : "TX",
|
|
hop);
|
|
continue;
|
|
}
|
|
/* we do not check ring->running, this is done in ring->work */
|
|
schedule_work(&ring->work);
|
|
}
|
|
mutex_unlock(&nhi->lock);
|
|
}
|
|
|
|
static irqreturn_t nhi_msi(int irq, void *data)
|
|
{
|
|
struct tb_nhi *nhi = data;
|
|
schedule_work(&nhi->interrupt_work);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int nhi_suspend_noirq(struct device *dev)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
|
|
return tb_domain_suspend_noirq(tb);
|
|
}
|
|
|
|
static int nhi_resume_noirq(struct device *dev)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
|
|
/*
|
|
* Check that the device is still there. It may be that the user
|
|
* unplugged last device which causes the host controller to go
|
|
* away on PCs.
|
|
*/
|
|
if (!pci_device_is_present(pdev))
|
|
tb->nhi->going_away = true;
|
|
|
|
return tb_domain_resume_noirq(tb);
|
|
}
|
|
|
|
static int nhi_suspend(struct device *dev)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
|
|
return tb_domain_suspend(tb);
|
|
}
|
|
|
|
static void nhi_complete(struct device *dev)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(dev);
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
|
|
tb_domain_complete(tb);
|
|
}
|
|
|
|
static void nhi_shutdown(struct tb_nhi *nhi)
|
|
{
|
|
int i;
|
|
dev_info(&nhi->pdev->dev, "shutdown\n");
|
|
|
|
for (i = 0; i < nhi->hop_count; i++) {
|
|
if (nhi->tx_rings[i])
|
|
dev_WARN(&nhi->pdev->dev,
|
|
"TX ring %d is still active\n", i);
|
|
if (nhi->rx_rings[i])
|
|
dev_WARN(&nhi->pdev->dev,
|
|
"RX ring %d is still active\n", i);
|
|
}
|
|
nhi_disable_interrupts(nhi);
|
|
/*
|
|
* We have to release the irq before calling flush_work. Otherwise an
|
|
* already executing IRQ handler could call schedule_work again.
|
|
*/
|
|
if (!nhi->pdev->msix_enabled) {
|
|
devm_free_irq(&nhi->pdev->dev, nhi->pdev->irq, nhi);
|
|
flush_work(&nhi->interrupt_work);
|
|
}
|
|
mutex_destroy(&nhi->lock);
|
|
ida_destroy(&nhi->msix_ida);
|
|
}
|
|
|
|
static int nhi_init_msi(struct tb_nhi *nhi)
|
|
{
|
|
struct pci_dev *pdev = nhi->pdev;
|
|
int res, irq, nvec;
|
|
|
|
/* In case someone left them on. */
|
|
nhi_disable_interrupts(nhi);
|
|
|
|
ida_init(&nhi->msix_ida);
|
|
|
|
/*
|
|
* The NHI has 16 MSI-X vectors or a single MSI. We first try to
|
|
* get all MSI-X vectors and if we succeed, each ring will have
|
|
* one MSI-X. If for some reason that does not work out, we
|
|
* fallback to a single MSI.
|
|
*/
|
|
nvec = pci_alloc_irq_vectors(pdev, MSIX_MIN_VECS, MSIX_MAX_VECS,
|
|
PCI_IRQ_MSIX);
|
|
if (nvec < 0) {
|
|
nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
|
|
if (nvec < 0)
|
|
return nvec;
|
|
|
|
INIT_WORK(&nhi->interrupt_work, nhi_interrupt_work);
|
|
|
|
irq = pci_irq_vector(nhi->pdev, 0);
|
|
if (irq < 0)
|
|
return irq;
|
|
|
|
res = devm_request_irq(&pdev->dev, irq, nhi_msi,
|
|
IRQF_NO_SUSPEND, "thunderbolt", nhi);
|
|
if (res) {
|
|
dev_err(&pdev->dev, "request_irq failed, aborting\n");
|
|
return res;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
{
|
|
struct tb_nhi *nhi;
|
|
struct tb *tb;
|
|
int res;
|
|
|
|
res = pcim_enable_device(pdev);
|
|
if (res) {
|
|
dev_err(&pdev->dev, "cannot enable PCI device, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
res = pcim_iomap_regions(pdev, 1 << 0, "thunderbolt");
|
|
if (res) {
|
|
dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
nhi = devm_kzalloc(&pdev->dev, sizeof(*nhi), GFP_KERNEL);
|
|
if (!nhi)
|
|
return -ENOMEM;
|
|
|
|
nhi->pdev = pdev;
|
|
/* cannot fail - table is allocated bin pcim_iomap_regions */
|
|
nhi->iobase = pcim_iomap_table(pdev)[0];
|
|
nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff;
|
|
if (nhi->hop_count != 12 && nhi->hop_count != 32)
|
|
dev_warn(&pdev->dev, "unexpected hop count: %d\n",
|
|
nhi->hop_count);
|
|
|
|
nhi->tx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
|
|
sizeof(*nhi->tx_rings), GFP_KERNEL);
|
|
nhi->rx_rings = devm_kcalloc(&pdev->dev, nhi->hop_count,
|
|
sizeof(*nhi->rx_rings), GFP_KERNEL);
|
|
if (!nhi->tx_rings || !nhi->rx_rings)
|
|
return -ENOMEM;
|
|
|
|
res = nhi_init_msi(nhi);
|
|
if (res) {
|
|
dev_err(&pdev->dev, "cannot enable MSI, aborting\n");
|
|
return res;
|
|
}
|
|
|
|
mutex_init(&nhi->lock);
|
|
|
|
pci_set_master(pdev);
|
|
|
|
/* magic value - clock related? */
|
|
iowrite32(3906250 / 10000, nhi->iobase + 0x38c00);
|
|
|
|
tb = icm_probe(nhi);
|
|
if (!tb)
|
|
tb = tb_probe(nhi);
|
|
if (!tb) {
|
|
dev_err(&nhi->pdev->dev,
|
|
"failed to determine connection manager, aborting\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
dev_info(&nhi->pdev->dev, "NHI initialized, starting thunderbolt\n");
|
|
|
|
res = tb_domain_add(tb);
|
|
if (res) {
|
|
/*
|
|
* At this point the RX/TX rings might already have been
|
|
* activated. Do a proper shutdown.
|
|
*/
|
|
tb_domain_put(tb);
|
|
nhi_shutdown(nhi);
|
|
return -EIO;
|
|
}
|
|
pci_set_drvdata(pdev, tb);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void nhi_remove(struct pci_dev *pdev)
|
|
{
|
|
struct tb *tb = pci_get_drvdata(pdev);
|
|
struct tb_nhi *nhi = tb->nhi;
|
|
|
|
tb_domain_remove(tb);
|
|
nhi_shutdown(nhi);
|
|
}
|
|
|
|
/*
|
|
* The tunneled pci bridges are siblings of us. Use resume_noirq to reenable
|
|
* the tunnels asap. A corresponding pci quirk blocks the downstream bridges
|
|
* resume_noirq until we are done.
|
|
*/
|
|
static const struct dev_pm_ops nhi_pm_ops = {
|
|
.suspend_noirq = nhi_suspend_noirq,
|
|
.resume_noirq = nhi_resume_noirq,
|
|
.freeze_noirq = nhi_suspend_noirq, /*
|
|
* we just disable hotplug, the
|
|
* pci-tunnels stay alive.
|
|
*/
|
|
.restore_noirq = nhi_resume_noirq,
|
|
.suspend = nhi_suspend,
|
|
.freeze = nhi_suspend,
|
|
.poweroff = nhi_suspend,
|
|
.complete = nhi_complete,
|
|
};
|
|
|
|
static struct pci_device_id nhi_ids[] = {
|
|
/*
|
|
* We have to specify class, the TB bridges use the same device and
|
|
* vendor (sub)id on gen 1 and gen 2 controllers.
|
|
*/
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
|
|
.subvendor = 0x2222, .subdevice = 0x1111,
|
|
},
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
|
|
.subvendor = 0x2222, .subdevice = 0x1111,
|
|
},
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI,
|
|
.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
|
|
},
|
|
{
|
|
.class = PCI_CLASS_SYSTEM_OTHER << 8, .class_mask = ~0,
|
|
.vendor = PCI_VENDOR_ID_INTEL,
|
|
.device = PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI,
|
|
.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
|
|
},
|
|
|
|
/* Thunderbolt 3 */
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_USBONLY_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_USBONLY_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_NHI) },
|
|
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_USBONLY_NHI) },
|
|
|
|
{ 0,}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, nhi_ids);
|
|
MODULE_LICENSE("GPL");
|
|
|
|
static struct pci_driver nhi_driver = {
|
|
.name = "thunderbolt",
|
|
.id_table = nhi_ids,
|
|
.probe = nhi_probe,
|
|
.remove = nhi_remove,
|
|
.driver.pm = &nhi_pm_ops,
|
|
};
|
|
|
|
static int __init nhi_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = tb_domain_init();
|
|
if (ret)
|
|
return ret;
|
|
ret = pci_register_driver(&nhi_driver);
|
|
if (ret)
|
|
tb_domain_exit();
|
|
return ret;
|
|
}
|
|
|
|
static void __exit nhi_unload(void)
|
|
{
|
|
pci_unregister_driver(&nhi_driver);
|
|
tb_domain_exit();
|
|
}
|
|
|
|
module_init(nhi_init);
|
|
module_exit(nhi_unload);
|